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A major challenge of Dynamic Binary Translation (DBT) is to efficiently handle the indirect branch. Conventionally, to translate indirect branches (IBs), DBT systems need to conduct address mapping between Source Binary Blocks (SBB) and Translated Binary Blocks (TBB). However, even a dedicated address mapping process still results in non-trivial performance overheads to DBT. This paper first provides...
Heterogeneous multi-core processors have strong potential for performance improvement, energy efficiency and area efficiency, compared to the homogeneous multi-core processors. The present methods of execution migration for heterogeneous multi-core processor suffer in efficiency, cost, compatibility, or programmability. In this paper, we propose a HW/SW code sign migration method based on binary-instrumentation...
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