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A 64 × 3-bit read-only memory (ROM), employing dual decoder architecture, is designed in GaAs HBT technology. It is adopted in Direct Digital Synthesizer (DDS) for phase-to-amplitude conversion. To enhance the performance of the ROM, the memory cell is designed with a transistor to assign both a high and low bit value. The ROM draws a current of 130 mA from a -4.6 V power supply. Using 700 GaAs HBT...
This paper proposes a new DDS architecture combined with Nonlinear DAC and Wave-Correction-ROM (WCR) which shows both high operating speed and accuracy. Based on this architecture, a 6 GHz 8-bit DDS MMIC is designed and fabricated in 60 GHz GaAs HBT Technology. The DDS MMIC includes 8-bit pipeline accumulator, an 8×8×3 bits WCR, two combined DACs and an analog Gilbert Cell for sine-wave generation...
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