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Programming Micron's Automata Processor (AP) requires expertise in both automata theory and the AP architecture, as programmers have to manually manipulate state transition elements (STEs) and their transitions with a low-level Automata Network Markup Language (ANML). When the required STEs of an application exceed the hardware capacity, multiple reconfigurations are needed. However, most previous...
To design a miniaturized low cost anti-jamming BeiDou antenna array system, the time sequence phase weighting (TSPW) technique is used to reduce the use of RF channel. In comparison with other methods to realize the single channel structure, TSPW has a lower hardware requirement and cost. In this paper, a four-element BeiDou navigation array using TSPW is simulated. By applying the power inversion...
Moore's Law effectively doubles the compute power of a microprocessor every 24 months. Over the past decade, however, this doubling in performance has been due to the doubling of the number of cores in a microprocessor rather than clock speed increases. Perhaps nowhere is this more evident than with the Intel Xeon Phi coprocessor. This many core architecture exhibits not only massive inter-core parallelism...
In order to establish a comprehensive automatic visual surveil-lance system, many researches aimed at tracking objects for high-precision and recognized objects for high accuracy. The process of these technologies involves a lot of computation load and even highly complex algorithms to meet the requirement. However, while implementing these technologies for the application in embedded systems or low-end...
In this paper, an energy-saving LED control module is designed and implemented for agent-based Micro-gird systems. The proposed LED control modules have the properties of low power consumption and low cost which can be integrated with agent-based Micro-Grid systems. The hardware of proposed control module uses Programmable Logic Controller (PLC) with RS485 and RS232 to control LED lamps. An embedded...
The 2D to 3D conversion technique plays an important role in the development and promotion of three-dimensional television (3DTV), because it can provide adequate supply of high-quality 3D program content. This Paper focuses on the real-time implementation of 2D-3D system, of which the major parts are source depth-map generation and depth image-based rendering (DIBR). The depth-map is generated by...
With the development of display hardware, computing power, transmission and rendering algorithm, 3DTV is becoming the most promising technology that provides the users a more natural viewing experience than 2D displays. But most 3D movies need to wear 3D glasses to watch. Naked eye 3D is the ultimate goal of the development of 3D technology. Multi-view rendering by depth image based rendering (DIBR)...
The real-time visualization of multi-dimensional spatial data of fluid phenomenon has always been a big issue. As to these temporal data, this paper provides a multi-dimensional rendering method for grid data of regular three-dimensional space -- dynamic partition projection. This method generates fluid space LOD dynamically through combining the idea of direct volume rendering and imposter technology,...
For advanced per-flow service disciplines at high-speed network links, it is essential to maintain priority queues in sorted order. The scalable priority queue implementation requires managing a large number of queues at ever increasing line speeds. In this paper, we propose novel solutions to the management of priority queues using a previously proposed pipelined Counting Priority Index (pCPI) structure...
As today's consumer electronics get increasingly portable and ubiquitous, rising complexity succeeds to more functionalities integrated. Market dynamics and competitiveness further squeeze the time-to-market requirement, consequently pushing system designers to the very throughout consideration during the development process. Traditional development approaches could not satisfy with such compact demands...
A System-on-Chip Design of VLD (Variable Length Decoder) in multi-standard video decoder is proposed in this paper. Our design supports all the popular video compression standards, e.g. MPEG-1, MPEG-2, MPEG-4, H.264, AVS, RealVideo. Benefit from its low power, the design is especially suitable for wearable multimedia applications. Simulation results show that the whole design takes an area of 1.04mm2,...
This paper improved the greedy partitioning algorithm targeting hardware resource use efficiency in traditional partitioning algorithms. In the improved algorithm, introduced a guiding function, which decided by four factors: the criticality, saved time, frequency and area of tasks. The improved algorithm can not only improve the resource use efficiency, but also pay attention to the task on the critical...
IT services need an automatic and flexible ability to react to dynamic changes in their environment. Managing change effectively and reducing the negative effects of day-today operations has become one of the most important tasks in IT service management, which require hiring highly skilled IT professionals with correspondingly high labor costs. There is a challenge to select, implement and integrate...
Evolvable hardware is consisted of hardware and evolvable algorithm. It has the ability of self-organization, self-adapt, self-repair and auto-design. Because of its important application values and the shortcomings of traditional methods, generating evolvable circuit with quick speed and obtaining the optimal evolvable circuit are the hotspot in the field of evolvable circuit. In this paper a two...
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