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Although valuable, the high-quality video compression format H.264/AVC workload complicates real-time encoding. This paper describes scalable parallel processing for H.264/AVC. Macroblock (MB)-level decomposition is more scalable than conventional methods for increasing the number of multiple threads. Moreover, it presents memory bandwidth advantages. This parallel algorithm can be improved using...
Although SIMD instructions are effective for many digital signal processing applications, current compilers cannot take full advantage of SIMD instructions. One factor inhibiting SIMD code generation is control flow structure; the target scope of SIMD code generation is currently limited to single basic block or loop that consists of single basic block. SIMD instructions cannot be mapped typically...
The traditional software defined radio (SDR) implementations use either a high-performance Field Programmable Gate Array (FPGA) or multiple high-speed Digital Signal Processors (DSPs) to execute digital signal processing, consuming a large amount of electrical power. To realize an SDR mobile handset, it is necessary to reconcile the two contradictory requirements; high performance able to execute...
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