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A heterogeneous multicore processor is proposed to accelerate advanced driver assistance system (ADAS). To enable a real-time operation of ADAS functions with 720p stereo video stream, multiple granualrity parallel SIMD/MIMD architecture is proposed with precise visual attention and high throughput network-on-chip to reduce computation cost and network congestion, respectively. In addition, it employs...
An energy-efficient Deep Neural Network (DNN) processor is proposed for high-speed Visual Attention (VA) engine in a mobile vision SoC. The proposed embedded DNN realizes VA to rapidly find ROI tiles of potential target objects reducing ∼70% of recognition workloads of vision processor. Compared to previous VA, the DNN VA reduces execution time by 90%, which results in 73.4% overall OR time reduction...
In this paper, we propose a real-time stereo matching processor based on the belief propagation algorithm. Computationally complex message construction is accelerated by a disparity-parallel PE array architecture, which calculates messages for all disparity levels (1-32) in parallel. A tile-based belief propagation approach reduces the on-chip memory requirements by 95.4% compared to the previous...
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