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Parity checking is one of the extensively used approaches for error detection in conventional digital systems. This work presents a 4×4 reversible logic gate (SMS gate) integrated with parity preserving property, which produces all primitive Boolean gates. The hardware complexity in terms of total logic count of SMS gate is 6α+1β only, which found to be minimal compared to all the existing gates....
Reversible logic is one of the emerging computational methodologies which assures zero power dissipation through theoretical laws of thermodynamics. It has received significant interest in application on quantum computing, nanotechnologies and low power computing devices. In this work, we present a reversible logic implementation for Binary Coded Decimal (BCD) adder which is designed to obtain lowest...
Reversible logic is an emerging technique of upcoming future technologies. Low heat dissipation and energy recycle principle are encouraging its demand for low power daily usage portable devices. In this paper, two reversible gates have been proposed, named as R-I gate and R-II gate, for realizing reversible combinational logic circuits. The proposed two gates can be used for realisation of basic...
In low power circuit design, reversible computing has become one of the most efficient and prominent techniques in recent years. In this paper, reversible Arithmetic and Logic Unit (ALU) is designed to show its major implications on the Central Processing Unit (CPU).In this paper, two types of reversible ALU designs are proposed and verified using Altera Quartus II software. In the proposed designs,...
Coalition formation (CF) creates a coherent group between autonomous agents to efficiently achieve individual or collective goals. However, the idle agents are not able to maximize their utility. In this paper, the weighted voting mechanism (WVM) has been proposed that allows agents to join existing coalitions. The experiments endorsed agents' number and the trust element as parameters to study the...
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