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Many wireless communication systems such as IS-54, enhanced data rates for the GSM evolution (EDGE), worldwide interoperability for microwave access (WiMAX) and long term evolution (LTE) have adopted low-density parity-check (LDPC), tail-biting convolutional, and turbo codes as the forward error correcting codes (FEC) scheme for data and overhead channels. Therefore, many efficient algorithms have...
Low density parity check (LDPC) codes are known to achieve a performance very close to the Shannon capacity limit on Additive White Gaussian Noise (AWGN) and erasure channels. The extrinsic information transfer (EXIT) chart is a powerful method for analyzing iteratively decoded codes such as Turbo codes. EXIT charts were introduced as a method for representing how the mutual information between the...
In this paper, we propose a class of adaptive low-density parity-check (LDPC) codes for reliable data transmission in wireless networks, i.e. the code rate can be adapted according to channel conditions to maximize the total capacity. Constructed from shifted identity matrices, the first advantage of the proposed codes is that these codes are particularly well-suitable for the high-speed implementation...
Low-density parity-check (LDPC) codes offer a very powerful error correction technique which allows data transmission in wireless networks at rates near the channel capacity with arbitrarily low probability of error. In this paper, we design a class of linearly encodable LDPC codes with adaptive code rates, i.e. the code rate can be adapted according to channel conditions to maximize the total capacity...
This paper discusses high-performance code construction and high-speed encoder and decoder designs for low density parity check (LDPC) codes. Thanks to their nice structures, LDPC codes constructed from shifted identity matrices have been emphasized. Several techniques in code constructions have been proposed to lower the bit error floor down to 10-10. Characterized by a parity check matrix in a triangular...
Low-density parity-check codes using the belief-propagation decoding algorithm tend to exhibit a high error floor in the bit error rate curves, when some problematic graphical structures, such as the so-called trapping sets, exist in the corresponding Tanner graph. This paper presents a joint row-column decoding algorithm to lower the error floor, in which the column processing is combined with the...
This paper discusses the design of a high-speed encoder for low density parity check (LDPC) codes. To minimize hardware costs and memory requirements of such encoders, a class of high-performance quasi-cyclic LDPC codes which can be encoded in linear time has been proposed by designing the parity check matrix in a triangular plus dual-diagonal form. Based on the proposed codes, parallel architectures...
This paper discusses the design of capacity-approaching irregular low density parity check (LDPC) codes constructed from circulant permutation matrices with low error floors. The experimental results indicate that the performance in the waterfall region of the error curve can be improved by increasing the maximum column degree or by decreasing the fraction of columns with maximum degree in the parity...
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