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Safety-critical systems consolidating multiple functionalities of different criticality (so-called mixed-criticality systems) require separation between these functionalities to assure safety and security properties. Performance-hungry and safety-critical applications (like a radar processing system steering an autonomous flying aircraft) may demand an embedded highperformance computing cluster of...
Ethernet is a key technology to satisfy the communication requirements of future automotive embedded systems. Audio/Video Bridging (AVB) Ethernet is a set of IEEE standards that allows synchronous and time-sensitive communication. It is the favored candidate for backbone and camera applications, but is not expected to replace Controller Area Network (CAN). Instead, both have to coexist in future architectures...
Several industry trends and new applications have brought the residential gateway router (RGR) to the center of digital home with direct connectivity to the service provider's network. Increasing risks of network attacks have necessitated the need for deep packet inspection in network processor (NP) used by RGR to match traffic at multiple gigabit throughput. Traditional deep packet inspection (DPI)...
This paper presents an idea to redesign the existing mobile computing system scheduler with Apps-usage awareness. By identifying the Apps-usage patterns, we model the relationship between system power consumption and different combinations of Apps. As observed some of the Apps combinations produce more power dissipation comparing to the others. The proposed scheduler reorders the Apps scheduling sequence...
Power densities and thermal hotspots are a major concern for the dependability of future multi-processor systemon- chip. They can lead to transient faults affecting the functionality in the short term and can cause permanent damage of a device. The dependability problem can be tackled on different layers such as technology hardening or application awareness. This work is based on an approach that...
Isn't it the most exciting time ever to work on reconfigurable computing! This statement, although true during past decades when new breakthroughs in technology evolution were made, particularly is true today. To what other conclusion should one come considering the societal challenges we are facing in the context of sustainable energy generation and distribution, the transition towards a smarter...
The design and operation of an aircraft, a railway, and a nuclear power station that include either safety-critical or safety-related systems require a proof that its safety is assured. The process providing this proof is called certification. This paper suggests an iterative FPGA implementation and iterative certification concept for FPGA-based systems to provide design-time adaptability while the...
The introduction of virtualized multi-core processors in automotive embedded systems opens up opportunities like safe consolidation of previously distributed electronic control units (ECUs) on a shared platform. On the other hand, challenges arise in areas like I/O processing due to overheads experienced in virtualized environments. Designs of I/O controllers have to be adjusted to allow efficient,...
With customer demand for more comfort and safety features, the amount of software and electronics in a car is steadily growing. In order to cope with the corresponding increased power consumption of the E/E (electric/electronic) architecture, various power saving techniques were developed to turn off functions, electronic control units (ECUs), or even whole bus systems when they are temporarily not...
An important trend in automotive CPS is the shift from federated to integrated IT architectures, where multiple functions are consolidated on shared electronic resources instead of distributed electronic control units (ECUs). It is driven by increasing complexity, cost and installation space requirements of todays architectures. However, side-by-side integration of mixed-criticality functions poses...
Electric/Electronic architectures in modern automobiles evolve towards an hierachical approach where functionalities from several ECUs are consolidated into few domain computers. Performance requirements directly lead to multicore solutions but also to a combination of very different requirements on such ECUs. Using virtualization in addition is one promising way of achieving segregation in time and...
In a shared-memory based tiled many-core system-on-chip architecture, memory accesses present a huge performance bottleneck in terms of access latency as well as bandwidth requirements. The best practice approach to address this issue is to provide a multi-level cache hierarchy and a suitable cache-coherency mechanism. This paper presents a method to increase the memory access performance in distributed-directory-coherency-protocol...
System Integration using 3D technology is a very promising way to cope with current and future requirements for electronic systems. Since the pure shrinking of devices (known as “More Moore”) will come to an end due to physical and economic restrictions, the integration of systems (e.g. by stacking dies, or by adding sensor functions) shows a way to maintain the growth in complexity as well as in...
Networks on Chip (NoC) come along with increased complexity from the implementation and management perspective. This leads to higher energy consumption and programming complexity of NoC architectures. This work introduces communication aware programming to address communication resource management and efficient programming of NoC architectures. A programming interface is introduced to express communication...
The rapid shrinking of device geometries in the nanometer regime requires new technology-aware design methodologies. These must be able to evaluate the resilience of the circuit throughout all System on Chip (SoC) abstraction levels. To successfully guide design decisions at the system level, reliability models, which abstract technology information, are required to identify those parts of the system...
Virtualized or partitioned real-time embedded systems consolidate mixed-criticality applications on a common (multi-core) platform. Such embedded systems need high performance solutions for secure and safe sharing of Input/Output (I/O) subsystems. This paper suggests a hardware-based I/O virtualization approach using memory-mapped I/O, Memory Management Unit (MMU), and I/O Memory Management Unit (IOMMU)...
Networks-on-Chip have shown their scalability for future many-core systems on chip. In real world scenarios, where multiple applications are being executed over a shared NoC based platform, efficient utilization of Networks-on-Chip resources becomes challenging. Methodologies are required to ensure better utilization of NoC, especially in the scenarios, where the communication patterns of NoC traffic...
Network-on-Chip (NoC) have become favorable for on-chip communication, especially with the ever rising number of communication partners in future manycore system-on-chip. NoCs that are based on mesh topologies with dimension-routing are well-established as they scale well with the increasing number of communication partners and allow efficient router design. To be able to serve application demands...
Managing future many-core architectures with hundreds of cores, running multiple applications in parallel, is very challenging. One of the major reasons is the communication overhead required to handle such a large system. Distributed management is proposed to reduce this overhead. The architecture is divided into regions which are managed separately. The instance managing the region and the applications...
Highly scaled technologies at and beyond the 22-nm node exhibit increased sensitivity to various scaling-related problems that conspire to reduce the overall reliability of integrated circuits and systems. In prior technology nodes, the assumption was that manufacturing technology was responsible for ensuring device reliability. This basic assumption is no longer tenable. Trying to contain reliability...
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