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This paper reports on the detailed characteristics of a novel compliant bump for 3-D stacking with high-density inter-chip connections. The novel compliant bump is a cone-shaped bump made of Au. It is fabricated using electroplating of the Au into undercut holes formed in a photoresist. Because the cone bump is easily deformed under a pressing load, it possesses superior properties for inter-chip...
We have developed a compliant bump technology for 3D chip stacking with the same number of inter-chip connections as that in a VGA (video graphic array, 640 times 480). Using this technology together with a through-Si via (TSV) technology, we demonstrate a prototype of back-side illuminated CMOS image sensor, in which a very-thin rear-illuminated photodiode array is electrically connected to the CMOS...
We demonstrate low-temperature 3D chip-stacking (number of bumps: 25,200, bump size / bump pitch: 11 ??m / 20 ??m, chip-stacking temperature: 30??C) using the compliant bump. Low-temperature 3D chip-stacking was carried out by mechanical caulking using compliant bump and doughnut-shaped electrode. This method is very effective in realizing 3D chip-stacking even at room temperature.
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