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This paper describes new method of fault diagnosis in analog electronic circuits (AEC). Fault diagnosis in analog electronic circuits is in general tested along with one dimension: the generator frequency. In this paper, we present a novel approach that uses more than one dimension to test AEC (those new dimensions are: the load resistance & reactance, generator resistance & reactance). Proposed...
In the paper the application of the SVM (support vector machine) algorithm has been used for diagnosis and test of analog electronic circuits in time domain. Procedure designed belongs to simulation before test technique, where the fault models should be assumed at the before test stage (prototype stage). Both, parametric and catastrophic faults based on standard fault models are considered. Selected...
The testing and diagnosis catastrophic faults technique for analog high frequency (HF) circuits (passive filters and impedance matching circuits) is described in this paper. The novel method based on load and frequency as testing pair has been proposed. The impact of load on testing and diagnostic has been investigated. The best pairs of load and frequency have been chosen. The proposed approach of...
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