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A digital library designed in 200 nm fully depleted silicon on insulator (FD-SOI) technology is presented in this paper. For the purpose of a new technology the digital library containing 93 elements was designed. Created library allows automatic synthesis of digital blocks based on their description in hardware description languages (HDL). To preserve area occupied by each library element, height...
A bandgap voltage reference together with absolute temperature sensor (PTAT) designed in 200 nm SOI technology is presented in this paper. Three slightly different versions were designed to verify the diode models available in the SOI process. For more extensive SOI process study the chip was fabricated on three different substrates. The bandgap reference circuit generates Vref = 1.27 V with 10 mV...
This paper presents the design of the 10-bit Successive Approximation Register Analog-to-Digital Converter (SAR ADC) achieving 20 MHz sampling frequency at a power consumption of about 900 μW and 1.8 V power supply. The ADC was designed in 200 nm Silicon-On-Insulator (SOI) CMOS process. The SOI is one of the most advanced CMOS technology that allows to reduce the parasitic capacitances, limit power...
This paper presents the design of a new monolithic Silicon-On-Insulator pixel sensor in 200 nm SOI CMOS technology. The main application of the proposed pixel detector is the spectroscopy, but it can also be used for the minimum ionising particle (MIP) tracking in particle physics experiments. For this reason the overriding goal of the project was to increase the signal to noise ratio of the readout...
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