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The paper presents a formal design methodology for reconfigurable, modular digital controller logic synthesis. The project of embedded controller starts from behavioral, graphical hierarchical and concurrent state machine description in Unified Modeling Language (UML). After the hierarchical encoding of nested and concurrent superstates, the UML state machine diagram can be directly and automatically...
In this paper useful methods of concurrent processes synchronization in UML state machine diagrams are presented. It is not easy to transform complex behaviour description into statecharts, even if the formal specification has already been given, for example as a hierarchical Petri net. Both graphical forms of specifications can be used simultaneously, especially when overlapped concurrent processes...
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