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This paper describes the implementation of a low power and high performance embedded non-volatile memory macro utilizing conductive bridging random access memory (CBRAM) in a standard logic CMOS 130nm Process. A 1MBit embedded non-volatile memory (NVM) macro is presented that reduces write power per bit by more than one order of magnitude over state of art flash to less than 5pJ, while write performance...
In this paper we present User Customizable Logic Paper (UCLP) with a Sea-of Transmission-Gates (SOTG) of 2-V organic CMOS transistors. This can enable users to fabricate custom integrated circuits, by printing 200 wide interconnects with at-home ink-jet printers for the prototyping of large-area electronics and educational purposes. The SOTG reduces the area of the circuits in UCLP by between 11%...
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