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A robust poly opening polish (POP) CMP for replacement metal gate (RMG) application has been developed to meet the criteria of High-k metal gate (HKMG) devices at 28nm technology node. From the previous performance of POP CMP, the uniformity and loading was an important factor of product with HKMG. The polish rate and selective of platen 2, which were key physical characters, was taken to study by...
A high performance 22/20nm CMOS bulk FinFET achieves the best in-class N/P Ion values of 1200/1100 μA/μm for Ioff=100nA/μm at 1V. Excellent device electrostatic control is demonstrated for gate length (Lgate) down to 20nm. Dual-Epitaxy and multiple stressors are essential to boost the device performance. Dual workfunction (WF) with an advanced High-K/Metal gate (HK/MG) stack is deployed in an integration-friendly...
This paper presents the first 150 GHz amplifier in a digital 65 nm CMOS technology. Design techniques to preserve raw transistor gain near fmax include layout optimization, dummy-prefilled microstrip lines (MSL) for design-rule compliance, and matching topologies which minimize passive element losses. To the authors' knowledge, the measured 8.3 dB gain, 6.3 dBm saturated output power (Psat), 1.5 dBm...
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