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This paper describes a high efficiency rectifier circuit for passive UHF radio frequency identification (RFID) applications. The simulation and measurement show efficiency of 30.7% and 15% at low input power level respectively. The rectifier was fabricated in a standard 0.18um CMOS process and its core circuit occupied 0.169×0.137 mm2 silicon area.
An ultra-high-speed comparator design based on the regeneration architecture, which could be used in flash ADC, was presented in this paper. The speed of regeneration circuit was studied deeply. And the size of switch-MOSFET was optimized and makes the comparator could work at the speed as high as possible. The corresponding circuit layout was implemented in IBM 90-nm CMOS technology. The post simulation...
The operation, design and measurement of a charge pump in a 0.35 μm SiGe process are presented. Measurements show, within the operating frequency range of 3.1 GHz to 4.1 GHz, that the charge pump achieves a less than 0.6% mismatch between the source and sink current over the output voltage range of 0.6 V to 2.8 V at power voltage 3.3 V, and the reference spur is below -85 dBc. The charge pump is used...
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