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Truncated multiplication reduces part of the power required by multipliers by only computing the most-significant bits of the product. The most common approach to truncation includes physical reduction of the partial product matrix and a compensation for the reduced bits via different hardware compensation subcircuits. However, this results in fixed systems optimized for a given application at design...
High-end embedded wireless communication applications demand high performance, strict low power, and in-field reprogrammability to follow the evolving standards. Today's single-core GPPs or DSPs cannot satisfy the challenging market performance requirements. Through specially tailoring individual processor core architectures to best fit a set of dedicated applications, heterogeneous multi-core architectures...
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory architecture, and task mapping and scheduling. This paper presents an integer linear programming formulation for the task mapping and scheduling problem. The technique incorporates profiling-driven loop level task partitioning,...
This paper presents a design of wireless network system based on Zigbee for monitoring the formaldehyde level. The system consists of coordinator, router and sensor nodes, in which signals are mainly controlled, transmitted and received by Chipcon's leading SoC chip CC2430. The communication in the network is realized by Texas Instruments' Z-stack, which is compatible with Zigbee specification. Compared...
As multiprocessor system-on-chip (MPSoC) approaches become popular in embedded system designs, simulation tools for modelling these systems are highly in demand for evaluating the performance and cost at both hardware design stage and software development phase. This paper presents a fast, flexible, and cycle-accurate simulation tool for MPSoCs targeting emerging dynamically reconfigurable processors...
Multiprocessor system-on-chip (MPSoC) architectures are increasingly being adopted in the design of emerging complex embedded systems. This paper introduces a new application mapping technique for MPSoC architectures using a case study. The technique incorporates profiling-driven task partitioning, task transformations, loop level partitioning and memory architecture aware data mapping to reduce system...
Wireless internet access technologies such as WiMAX have significant market potential. The high demand for embedded high performance WiMAX solutions is forcing designers to seek multi-core systems which offer competitive advantages in terms of all performance metrics. By providing the flexibility of a DSP with performance and power consumption approaching that of an ASIC, emerging dynamically reconfigurable...
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