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This paper presents an effective approach for reducing parasitic resistance of a CMOS negative inductor with a single compensating resistor. A compensating resistor is used to mitigate the effect of parasitic resistance with quadratic frequency dependence. The undesired parasitic effect is induced by the inevitable finite drain-source resistance of the input CMOS transistor of the most common Linvill...
Recent advances in technology have driven renewed interest in the design of CMOS negative capacitance circuits for diverse applications such as wideband metamaterials and radio frequency integrated circuits. In practice, the particular CMOS fabrication process generally limits the practical range of capacitance values and bandwidths that can be achieved. In addition, the reactive component of the...
Negative inductance circuits offer the potential for increased bandwidth in a variety of applications such as artificial magnetic conductors and metamaterials with negative permeability. To address such applications, a CMOS dc-coupled negative inductance circuit with integrated bias circuits is presented. The dc-coupled input is tailored to operate at low voltages and accommodate applications having...
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