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A wide band, low power, injection-locked oscillator (ILO)-type clock and data recovery (CDR) with high jitter tolerance is implemented in 28 nm CMOS. A robust phase and frequency detection algorithm independently controls ILO free running frequency and clock phase without an external time reference. A wide capture range of −25/+15% enables reference-free frequency acquisition. Jitter tolerance is...
The consumer electronics market demands high-speed and low-power serial data interfaces. The injection locked oscillator (ILO) based clock and data recovery (CDR) circuit [1–2], is a well-known solution for these demands. The typical solution has at least two oscillators: a master and one or more slaves. The master, a replica of the data path ILO, is part of a phase locked loop (PLL) used to correct...
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