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Continuous time delta-sigma (CTΔΣ) analog-to-digital converters (ADCs) are capable of sampling at much higher rates than discrete time ΔΣ converters. This makes heterojunction bipolar transistor (HBT) technologies excellent candidates for the implementation of fast CTΔΣ ADCs. Due to linearity considerations, all HBT-based ΔΣ ADCs known to us incorporated a single-bit digital-to-analog converter (DAC)...
We present a high linearity 2-bit digital-to-analog converter (DAC) implemented in an InP/GaInAs DHBT technology. The DAC is based upon the current steering architecture. Cascode structure and layout techniques, i.e. static shuffling and dummy devices, have been used to enhance the linearity. The DAC exhibits static integral/differential nonlinearities of 5.5 × 10-3 LSB, equivalent to a resolution...
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