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The three dimensional SOC brings high density and function with one critical tail of thermal design. In order to optimize the self-heat problem, the author work in three steps aiming at 2006 data of 2005-ITRS, firstly to build a 3D-SOC thermal model in concern for three factors of temperature rise based on my die-stack definition and vertical interconnection description of Stanford's modified Rent...
This paper proposes a dynamic small signal model of the constant-frequency pulse width modulator of switching converters. The existing model is represented as a simple gain block Fm, which is relatively short in both accuracy and physical meanings. Employing the methods of probability, this dynamic model provides a more accurate prediction of the system behavior in the sense of statistics, compared...
A new efficient OPC model calibration method for optical lithography process is presented. The method is based on the applying of circle-sampling theorem in the description of mask and optical system. A new point intensity calculation method is then obtained from the representation of TCC and mask using a group of selected circle sampling functions. Then the CD value is computed using the constant...
Porous low-k materials are required for the advanced 45nm node and beyond ULSI interconnect system. The deteriorative mechanical properties of the porous materials must be evaluated accurately. Surface acoustic wave (SAW) technique can measure the Young's modulus of thin films accurately and nondestructively by analyzing the dispersive characters of SAW waves' propagation. In this paper, the theoretical...
With high resolution ADC has been widespread used in communication and multimedia, oversampling Sigma-Delta ADC becomes the main path of implementing high resolution ADC. Oversampling Sigma-Delta ADC is composed of two basic blocks: a noise shaping sigma delta modulator and a digital signal processing block for filtering and decimation. This paper mainly discuss noise shaping sigma delta modulation...
Research into modeling, verification and circuit applications of transformers in CMOS is reviewed. Transformer concepts and topologies are followed by discussions of the use of transformers for power and area reduction, bandwidth enhancement, modeling, etc. Finally, conclusions are drawn on future research directions for the use of transformers in CMOS design
This paper deals with the design of a dual-mode equalizer for QAM demodulator in FPGA. The fractionally spaced mode is supported as well as conventional symbol-spaced mode without changing the clock rate. The equalizer can also be configured to handle spectrum inversion. Meanwhile we optimize the implementation architecture to reduce hardware complexity. Test results show that the equalizer can achieve...
This paper reports a DAB receiver baseband chip consisting of a DAB baseband decoder and a MPEG L2 audio decoder. The chip complies with European DAB standard Eureka 147 and newly announced Chinese DAB standard GY/T214 2006. The chip was fabricated using standard 0.18 micron CMOS technology and achieved extremely low power dissipation of 30 mW and low gate count of only 100K logic. A DAB receiving...
This article introduces the implementation of an 8-bit high performance network microcontroller. This chip is mainly composed of an 8-bit embedded MCU integrated with a 10M Ethernet MAC. A two-stage pipeline and ESFR (external special function register) method are adopted to design a high performance MCU. The architecture, features and main modules realization of the chip are discussed in the paper...
This presentation summarizes some of the most recent Si innovations made for advanced CMOS transistors in the nanotechnology era. Through these Si nanotechnologies, it is expected that CMOS scaling and performance trends extend and continue well into the next decade. Additionally, there has been much interest generated recently in the research of non-silicon materials and nanoelectronic devices and...
The development of silicon technology has been, and will continue to be, driven by system needs. The continuous and systematic increase in transistor density and performance, guided by CMOS scaling theory (Dennard et al., 1974) and described in "Moore's Law" (Moore, 1975), has been a highly successful process for the development of silicon technology for the past 40 years. As the silicon...
The paper discusses the mission and findings of our MARCO Focus Center on Functional Engineered Nano Architectonics (FENA) and the Western Institute of Nanoelectronics (WIN). In the Center and the Institute funded by SIA, we explore different logic state variables, such as the use of particle spin, molecular conformation and others in addition to today's charge based electronics, for resolving the...
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