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A new diode technology called Emitter Controlled (EC)-HDR (High Dynamic Robustness) that allows a pronounced enhancement in switching safe-operating area has been developed. For the first time, the concept used for this drastic improvement is presented. The same principle has been applied to the Insulated Gate Bipolar Transistor (IGBT).
We find that off-state breakdown in AlGaN/GaN insulated-gate HEMTs can occur at the source-side of the gate with increase in the drain voltage. This new finding is borne out by extensive electrical measurements and confirmed with the OBIRCH (Optical Beam Induced Resistance CHange) technique. It is explained by a hypothesis whereby holes generated at high Vds flow to the source-side of the gate, and...
The reliability of high performance Field-PMOS FET with thick gate oxide was improved. By reducing the amount of charge in the insulating film, RESURF effect was well performed in the drift region to obtain BVDSS over 350 V. Gate oxide breakdown voltage was found to decreas at AC high slew rate, and its reduction was suppressed with the fluorine termination. NBTI shift was also reduced within 15 %...
A gate driver IC with programmable output resistance (Rout) capable of performing current balancing for parallel connected IGBTs is presented in this paper. This novel method is to dynamically adjust the gate driver Rout to minimize the difference in the turn-on/off delay times between parallel connected IGBTs. The programmable gate driver Rout is implemented using a segmented output stage technique...
We developed a new backside contact formation process for SiC power devices based on pulsed laser annealing providing an ohmic contact with lower contact resistance and better adhesion properties than contacts formed by conventional rapid thermal annealing. This process does not add any significant thermal budget to the wafer front side and therefore allows a “short thin wafer” process, means completing...
A novel low voltage power MOSFET with a low threshold voltage (Vth) region (sub-MOS) is proposed. The proposed MOSFET has a superior trade-off relationship between output efficiency and switching noise, with a spike voltage 82% lower than a conventional MOSFET and the same efficiency at 300 kHz with an output current of 20 A. Since the proposed device reduces the drain current through rate (dir/dt)...
A 30V power MOSFET technology, employing a low voltage superjunction approach, has been optimized for operation as a low-side switch in a DC-DC buck converter. In particular, this technology has been designed with an emphasis on minimizing the voltage overshoots that occur in high efficiency DC-DC converters by modification of the MOSFET's body diode and output capacitance, COSS. This has resulted...
In this paper, we demonstrate 253% improvement in the off-state breakdown voltage (BV) of the lattice-matched In0.17Al0.83N/GaN high-electron-mobility transistors (HEMTs) by using a new Schottky-Source technology. Based on this concept, the Schottky-Source (SS) InAlN/GaN HEMTs are proposed. The SS HEMTs with a LGD of 15 μm showed a three-terminal BV of 650 V, while conventional InAlN/GaN HEMTs of...
An 800V rated lateral IGBT for high frequency, low-cost off-line applications has been developed. The LIGBT features a new method of adjusting the bipolar gain, based on a floating N+ stripe in front of the P+ anode/drain region. The floating N+ layer enhances the carrier recombination at the anode/drain side of the drift region resulting in a very significant decrease in the turn-off speed and substantially...
MR-DCIV current has demonstrated the nondestructive capability to profile the interface states along the channel, accumulation and STI regions in high-voltage LDMOSFET. The correlation between interface state and MR-DCIV current has been studied under high voltage stresses in LDMOSFETs. Our study results show that RON degradation is mainly affected by newly-generated interface states in the STI region...
Enhancement-mode (E-mode) metal-oxide semiconductor high electron mobility transistors (MOSHEMTs) have been fabricated by selective area regrowth technique on AlN/GaN heterostructure. A selectively regrown AlGaN barrier layer could effectively increase the 2-dimensional electron gas (2DEG) density underneath. In comparison with the conventional methods of plasma etching/treatment in the gate region,...
In this paper, we propose a novel SiC vertical JFET (VJFET) with low feedback capacitance Crss by using a device simulator. A key feature of the proposed VJFET is the p+ screen grid inserted between gate and drain electrode. The screen grid is effective to reduce the Crss by 80% compared to conventional VJFETs. Due to the low Crss, total power loss of the proposed VJFET is the lowest among existing...
We have proposed and fabricated AlGaN/GaN MOSHEMTs employing an atomic-layer-deposited (ALD) Al2O3 gate insulator. A 10-nmm Al2O3 served as passivation layer as well as gate dielectric, which results in stable blocking characteristics. The drain leakage current of the proposed device was decreased by five orders. The leakage current of the conventional device (MESFET) with LGD of 15 μm was 87 μA/mm...
We report a new passivation technique that yields low OFF-state leakage current and greatly suppressed current collapse simultaneously in 600-V AlGaN/GaN high-electron-mobility transistors (HEMTs). This passivation structure consisted of an AlN/SiNx stack with 4-nm epitaxial AlN deposited by plasma-enhanced atomic layer deposition (PEALD) and 50-nm SiNx deposited by plasma-enhanced chemical vapor...
A bidirectional switching GaN transistor, PCB-packaged using commercially available high voltage power GaN HEMTs (200V, 3A) from EPC, has been modeled and characterized. A physics-based FET model, originally developed by Statz for short-channel GaAs MESFET, has been adapted to model both static and switching characteristics of both the constituent HEMT and the bidirectional switch up to 125°C. We...
We have examined the robustness of the novel enhancement-mode GaN vertical superjunction HEMT using numerical simulations, which has been designed previously and projected to have best Ron, sp of 4.2 mQ-cm2 and BV of 12.4kV, and compared it with a GaN vertical HEMT with conventional drift region. The GaN vertical superjunction HEMT with 8 μm pillar width shows 7X higher on-state current level and...
We propose the design and simulation study of novel gallium nitride (GaN) devices, consisting of nitride stacks with different polarity, to provide multiple channels by flexible gate(s) control. Calibrated TCAD device simulations visualize device characteristics of 0.62-μm-gate-length multi-channel transistors. E-mode operations demonstrate a positive small threshold voltage Vth below 2 V at Vds =...
Vertical structured diamond Schottky barrier diodes with thick field plate have been developed. The diamond VSBD with 30μm Schottky electrode realizes low specific on-resistance and reverse voltage such as 9.4mOhm-cm2 and 840V, respectively, even at 250°C. The Baliga's figure of limit (BVBD2/RonS) is 75.1 MW/cm2, which is the best value in diamond diode at present. The diamond VSBD with 1,000μm Schottky...
For high side gate driver IC, we applied to single p-type isolation technic between high side region and 700V LDMOS (lateral double-diffused MOS) drain to reduce electric potential of junction termination by the crossing drain metal of 700V LDMOS. This single p-type isolation has low doping concentration to be fully depleted for maintaining a high voltage, normally more than 700V. It is limited to...
This paper presents versatile HV lateral JFET design method on 0.18μm SOI BCD technology to achieve variable Vth(threshold voltage) and Idsat, without DIBL effect over full operating Vds range and scalable breakdown voltage capability on both N-ch and P-ch JFET. The significant advantage of a HV JFET compared to depletion MOSFET is the lower area consumption in real circuit design which due to higher...
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