The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
The effect of drift region on the flicker noise in LDMOS devices in the linear and saturation regions is analyzed using measured data and device simulations. In the linear region, noise in the drift region arises from gate-drain overlap region and is significant for longer channel length devices. For shorter channel length devices, the sub-surface current flow in the gate-drain overlap region reduces...
1/ƒ noise analysis is implemented as a quantitative measure for the dielectric / silicon interface related reliability and degradation in RESURF lateral double-diffused MOS transistors. The effect of DC stress on 1/ƒ noise performance as well as on the location of stress induced degradation have been investigated with respect to stressing time in differently processed low and medium voltage LDMOS...
Comprehensive requirements in aspects of cost, reliability, efficiency, form factor, weight, and volume for power electronics modules in modern electric drive vehicles have driven the development of automotive power packaging technology intensively. Innovation in materials, interconnections, and processing techniques is leading to enormous improvements in power modules. In this paper, the technical...
We have developed a new methodology to study the dynamic ON-resistance (RON) of high-voltage GaN High-Electron-Mobility Transistors (HEMTs). With this technique, we have investigated dynamic RON transients over a time span of 11 decades. In OFF to ON time transients, we observe a fast release of trapped electrons through a temperature-independent tunneling process. We attribute this to border traps...
A simple method to design the single-mask multi-zone junction termination extension (MZJTE) (SM-MZJTE) for high-voltage insulated-gate bipolar transistor (IGBT) is presented and experimentally demonstrated. By assuming that the p-type SM-MZJTE region is completely depleted and the equipotential lines are circular arcs for simplicity, an analytical model of the selective function is derived from the...
It has previously been reported that the lateral electric field (Ex) in the drain extension of thin SOI HV (700V) field plate assisted RESURF devices can be extracted from their ID-VD characteristics in the subthreshold regime. In this work the prerequisites for valid field extraction and the (voltage) range of validity are established for linearly graded drain extension based RESURF devices through...
An advanced 700V Smart Trench IGBT with monolithically integrated over-voltage and over-current protecting circuits is presented in this paper. The proposed Smart IGBT comprises a sense IGBT, a low voltage lateral n-channel MOSFET (M1), an avalanche diode (Dav), and poly-crystalline Zener diodes (ZD) and resistor (Rpoly). Mix-mode transient simulations with MEDICI have proven the functionalities of...
The isolated direct gate driver with Drive-by-Microwave technologies can directly drive a power switching device by wireless power transmission of RF modulated signal through the electromagnetic resonant coupler and requires no additional isolated voltage source. In order to improve the performance such as a fall time characteristic and a power consumption of the gate driver, a new direct gate driver...
Papers have been printed without editing as received from the authors. Copyright and Reprint Permission: Abstracting is permitted with credit to the source. Libraries are permitted to photocopy beyond the limit of US copyright law for private use of patrons those articles in this volume that carry a code at the bottom of the first page, provided the per-copy fee indicated in the code is paid through...
In this paper we present a physics based analytical model for the drain current Id in AlGaN/GaN high electron mobility transistors. The proposed model is developed based on the analytical 2-D electron gas density ns model developed previously by our group. The model includes important effects like velocity saturation, channel length modulation, short channel effect, pinch-off, mobility degradation,...
A novel p-type DP-OPTVLD (Double-Paths & OPTimum-Variational-Lateral-Doping) LDMOS is proposed. It features the double hole-conductive paths formed by a top and a buried p-layer in the drift region using OPTVLD technique, which significantly contribute to reducing device specific on-resistance. The design principle and electrical characteristics of the proposed structure are investigated theoretically...
We present our latest developments in ultra high voltage 4H-SiC IGBTs. A 4H-SiC P-IGBT, with a chip size of 6.7 mm × 6.7 mm and an active area of 0.16 cm2 exhibited a record high blocking voltage of 15 kV, while showing a room temperature differential specific on-resistance of 24 mΩ-cm2 with a gate bias of −20 V. A 4H-SiC N-IGBT with the same area showed a blocking voltage of 12.5 kV, and demonstrated...
A critical issue for the 4H-SiC UMOSFET is a shielding of the gate oxide at the bottom of the trench gate from the high electric field during the blocking state. This study develops the UMOSFET structure with low specific on-resistance and low electric field in the gate oxide by the two-dimensional numerical device simulation. The gate oxide field is successfully decreased without the degradation...
AlGaN/GaN Schttoky barrier diodes (SBDs) with and without in-situ silicon carbon nitride (SiCN) cap layer were investigated. The fabricated SBD with SiCN cap layer exhibited improved electrical characteristics, such as the forward turn on voltage of about 0.7 V, the forward current of 4.1 A at 1.5 V, and the reverse breakdown voltage of 630 V, compared to the corresponding values of 0.8 V, 3.8 A,...
The reliability of SiC bipolar device modules consisting of SiC commutated gate turn-off thyristors and SiC pin diodes fabricated on a 4° off-cut SiC substrate is investigated. According to three-phase inverter operation using a Back to Back system at DC bus voltage of 2 kV and effective output power of approximately 120 kW, the SiC module could achieve the world's first successful inverter operation...
In this paper, we studied the vertical leakage/breakdown mechanisms in AlGaN/GaN structures grown on low resistivity p-type (111) Si substrate by temperature-dependent current-voltage measurements. We suggested that the top-to-substrate vertical leakage/breakdown is dominated by the space-charge-limited current (SCLC) conduction mechanism involving both acceptor and donor traps in buffer/transition...
This paper deals with the power assembly failure anticipation by monitoring its mechanical state. From this perspective, we evaluate the impact of mechanical stress accumulation before crack opening on the electrical characteristics of a VDMOS transistor using 2D physical simulations. The power device I(V) characteristics depend both on temperature and mechanical stress. To estimate the impact of...
a 12V low Vgs (1.8V) RF-N/PLDMOS have been successfully implemented on the 0.18 µm analog CMOS process without thermal budget addition. N- and P-ch LDMOS needs additional body and drift implants, respectively. A short channel length and a small overlap of gate-to-drain were accomplished by the optimization of implant conditions for the source halo and the drift region which is followed by the gate...
In this paper, a monolithically integrated gate voltage pull-down circuitry is presented to avoid the unintentional C·dV/dt induced turn-on. The concept of a low threshold voltage MOSFET with this integrated gate voltage pull-down circuitry is introduced as a contributing factor to the next generation high frequency DC-DC converter efficiency improvement. Design considerations on this new device and...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.