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Conventional, split-drain MAGFETs have a relatively low sensitivity. The low sensitivity can be attributed to properties inherent to the traditional FET structure. A novel device structure, designed to overcome these shortcomings, is presented. In this device the gate voltage varies linearly along the gate. Measured sensitivities for both dual-drain and triple-drain devices are reported. The performance...
We propose an extraction procedure to determine the surface mobility of MOSFE Is based on the drain current equation after Pao and Sah. This model is extended to consider short channel effects and the charge of interface states in nonequilibrium. At low drain voltage the calculated drain current is compared to two-dimensional simulation results. Excellent agreement is found for samples with oxide...
Silicon-On-Insulator transistors are used with a double gate control. By this way, a fully inverted silicon film (interface and film volume) is obtained. This method allows us to greatly enhance the device performance, in particular the subthreshold swing, transconductance and drain current. Simulated and experimental characteristics on SIMOX structures are analysed to study the new device.
To achieve reliable, thermally stable ohmic contacts to n-GaAs, surface preparation and thickness of the AuGeNi films must be properly chosen. In this work the contact resistance as a function of the alloying temperature cycle has been studied for different AuGeNi thickness and sputter cleaning conditions. In-situ X-ray photoemission spectroscopy (XPS) analysis of the sputter-cleaned GaAs-surface...
Rutherford backscattering (RBS) has been used to study the redistribution of ion-implanted mercury and the reordering of implantation damage during Rapid Thermal Annealing (RTA) of Ga0.47 In0.53As epilayers and bulk InP. Implantation at 200??C prevents amorphous layer formation and reduces the extent of Hg redistribution in both materials. Si3N4 and phosphosilicate glass (PSG) are compared as encapsulants...
This paper Presents a Monte Carlo study of diffusion and noise in two-dimensional electron gas (2DEG) in heterojunctions. This is mainly achieved via the calculation of velocity fluctuations correlation functions of the 2DEG subjected to a driving field applied along the channel. It is found that at rather low fields when the carriers have a real two-dimensional motion, the parallel correlation functions...
The influence of the reoxidation after gate patterning on NMOS transistor characteristics is investigated. As the channel length LG is reduced the devices exhibit a reoxidation related VT increase. This VT variation is explained by a non-uniform oxidation enhanced diffusion of the channel dopant along the channel.
A new high voltage (H. V) npn bipolar transistor for H. V BiCMOS IC's has been developed which is fully compatible with conventional low valtage n-well CMOS process. The npn transistor employs n-well of low valtage (L.V) CMOS as the collector drift region and it acts as the self-isolation region as well. The narrow self-aligned base is a result of double diffusion. The device has shown a high performene,...
MESFET and MODFET device technologies are reviewed in terms of device characteristics and processing difficulties. The MODEET discussion is then extended to include the planar self-aligned processes. The requirements for molecular beam epitaxy are presented. The results for ring oscillators are compared as well as a number of other device/circuit results.
The influence of substrate material on Si-implanted CV-profiles is demonstrated on s.i. LEC grown GaAs. Local activation is affected by stoichiometry variations near dislocations. For higher concentrations the variations increase due to saturation effects. By co-implantation of As and enhanced implantation damage the activation is decreased and the dislocation influence increased.
Lasers with an integrated modulation section have been used to generate ultra-short actively modelocked optical pulses with 8 ps duration and powers in excess of 400 mW. The pulses are of smooth shape and free of substructures and bursts.
Some semiquantitative correlations among electron mobility profile trend, background acceptor and donor concentrations and compensation ratio in gallium arsenide apitaxial FET structures were ascertained from the comparison of several experimental and calculated data. The results obtained by this analysis are a useful tool in the electrical characterization of non intentionally doped buffer layers...
Low-temperature vapour phase epitaxy was applied to fabricate multilayer structures like camel diodes and camel transistors. Using the Low Pressure Vapour Phase Epitaxy (LP-VPE) silicon camel diodes with a conversion loss as low as 6 dB at 12 GHz and a noise figure of 7 dB were realized. GaAs hot electron transistors were fabricated by Organo-Metallic Vapour Phase Epitaxy (OM-VPE).
The molecular beam epitaxial growth of high quality InGaAlAs/InP and its application to low loss passive optical waveguides and waveguide-integrated photodiodes for operation at 1.55 ??m is described. The chemical etching characteristics of the layers were optimized in order to fabricate low loss (2.2 dB/cm) ridge waveguides. Integration of the waveguides with an InGaAs pin photodiode is demonstrated...
A simple general analytical solution to the minority carrier transport equations in an arbitrarily doped semiconductor (Si, GaAs, and InGaAsP) region is obtained by including an arbitrary non-thermal source term in the continuity equation. Internal quantum efficiencies resulting from AM1 illumination in gaussian doped silicon emitters are calculated by the new analytical expression arnd compared with...
Junction Field Effect Transistors with a micron diffused gate have been fabricated on InGaAs/InP grown by molecular beam epitaxy (MBE). Transconductances higher than 200 mS/mm with a channel doping level of 2.1016 cm??3 have been measured. A compact model for PIN - FET photodetector has been developed to optimize e signal to noise ratio.
Monolithically integrated GaInAs/InP pin/JFETs have been made from LPE grown material. The method of integration allows the pin and JFET to be optimised independently, while keeping stray capacitance extremely low. Similar JFETs have also been made by MOVPE.
The trapping properties of very thin nitride/oxide (10-14nm equivalent SiO2) composite gate insulators and their dependences on gate materials and process conditions are reported. Electron trapping and flatband voltage turn-around effects are more pronounced in these films than in thermal SiO2. They both appear to be dominated by water-related species in the bottom oxide layer when the top nitride...
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