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The design, the fabrication and the characterization of a BMFET (Bipolar Mode FET) with a maximum voltage of 1600 V and maximum current of 5 A (at hFS = 2.5) are reported. With the help of theoretical models, the effects of physical and geometrical parameters on the performance of the device are investigated and the rules to be used in the design are defined. The switching characteristics of the fabricated...
The Cd-diffusion at InP/InGaAs heterojunctions was investigated by C-V profiling of p-n junctions located on the InP-side close to the heterointerface. A compensated layer in front of the heterojunction is observed. Reducing the distance p-n junction-heterointerface decreases the width of this layer causing a distinct drop of the breakdown voltage of the junction. This effect is used to realize SAM...
an isolated vertical npn transistor fabricated in an n-well CMOS process is described. Characterisitic features of the transistor are examined, particularly in relation to the absence of a buried layer and low well doping. An equivalent circuit is presented to model the structure as a 4-terminal device, which can be implemented in SPICE without modification to the SPICE BJT model. A parameter extraction...
A numerical method based on the Gummel-Poon model is presented, which permits to calculate the components of the base resistance from the layout and easily accessible DC-parameters. The calculated results are compared with results derived from measured S-parameters.
Capacitance DLTS measurements have been performed in VPE. GaAs MESFETs prepared on Bridgman Cr-doped and LEC undoped semiinsulating substrates. A band of electron traps was detected near the metal (gate)-semiconductor interface. Near pinch-off conditions, a positive capacitance signal was found to dominate the DLTS spectra in samples prepared on Cr-doped substrates. The feature of this positive capacitance...
A modified photo-FET technique is presented where the Idss photoresponse before and after EL2 quenching is measured. The technique has been applied both to ion-implanted FETs and to VTPE grown devices with buffer thicknesses ranging from 0.7 ??m to 3 pm grown on chroinum-doped substrates. The removal of the EL2 contribution to the photoresponse leads to a modification of the charge states of the remaining...
This paper investigates the feasibility of using on-chip switching for the instrumentation used to measure transistor characteristics. The effect of the switching transistors on the measurements are evaluated by comparing the SPICE parameters extracted from measurements made via the switching transistors with those derived directly. It is shown lthat accurate SPICE parameters can be extracted from...
A method has been developed for estimation of soft error rate of memory chips. At special test structures which are as simply designed as possibly the charge collection induced by alpha strikes is measured. From these data the soft error rate can be calculated.
A new and accurate approach to ac conductance measurements on MOSFETs is presented. It is shown that the conductance technique can be used to study interface trap properties in the entire silicon band-gap by direct measurement on a single MOSFET. Moreover, the validity of the dynamic transcnductance method is assessed by comparing its results with those obtained from conductance measurements on the...
Low-noise HEMTs were evaluated for reliability by conducting high temperature accelerated life tests and examining the changes in electrical characteristics of the device as well as visual signs of degradation. The reliability of the HEMTs was found to be on the same level as that of conventional GaAs MESFETs, and no degradation associated with the unique structure of the HEMT was observed.
After a brief description of the basic structure and fabrication process of V. D, MOSFET's for power high frequency applications, a new non-linear dynamic model is proposed. The implantation of this model on the ASTEC III simulation program, enables its use for comparison between measured and computed characteristics under DC and small - signal conditions and to set up a new simulation procedure for...
The n/n+/n route to porous silicon has been used to produce fully dielectrically isolated silicon islands. Results are presented to show that doping of the island with residual n+ material can be avoided and that Lhe silicon is of high crystalline perfection. The technique is shown to avoid the limitations of the original p-n technique and to be extremely promising for SOI Device applications.
Charge trapping in thin Injection oxides used in EEPROMs is studied as a function of charge injected into the oxide. In MOS capacitors, pulsed alternating current injection is used to simulate the operation of EEPROM. The resulting shifts of flatband voltage are correlated with the shifts of threshold voltage in the WRITTEN and ERASED states in EEPROM cells. Positive charge generation depends more...
The degradation of tunnel oxide floating gate EEPROM devices was studied by using charge-pumping which allows direct characterization of the interface degradation on the transistor itself. It is found that positive charge is generated at the Si-SiO2 interface, while negative charges are trapped at the injecting interface or in the bulk of the oxide. Combining these findings with a study of the influence...
We present a general analysis of steady-state velocity fluctuations, diffusion and noise for electrons in GaAs-AlGaAs quantum wells under high-field conditions using an Ensemble Monte Carlo simulation. Here we analyze for the first time diffusivity and noise problems in a two-dimensional structure by means of the velocity autocorrelation function. From the Monte Carlo simulation we obtain results...
Activation energy Ea of grain-boundary vacancies was evaluated by means of noise measurements and MTF tests in narrow Al/Si (1%) resistors. The values obtained by these techniques are 0.93 and 0.96 eV respectively. Noise measuremen-ts revealed that after every temperature change the microstructure of the films was unstable. The presence of instabilities can strongly affect the Ea value.
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