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Mobile device application interface specifications have reached the data speed of gigabit per second per differential lane. Together with increased component density, miniaturization, multi-part devices, and increased signaling frequencies overlapping RF bands, the prediction of interface and system level behavior in terms of signal integrity becomes more and more complicated. This paper concentrates...
A simple rule of thumb is proposed for automatic model order estimation of the rational macromodels for passive components and systems. Based on an analysis of the dynamic behavior of the (measured or simulated) frequency domain scattering parameters, upper and lower bounds for the number of poles are proposed. Several interconnection examples with different complexity are presented to illustrate...
This paper reports measurement results of on-chip interconnects with CMP dummy fill. CMP dummy fill is a floating metal for metal density adjustment. In high frequency above 10 GHz, the eddy current induced in dummy fills affects the interconnect loss. We fabricated test structures of on-chip interconnect with dummy fills. From the measurement results, the effect of the dummy fills on the wire resistance...
As computer speeds continue to scale with Moore's law, improved transmission line modeling techniques are required for data rates greater than 3-5 gigabits per second (Gb/s). These transmission line models must accurately predict the interconnect characteristics to provide silicon designers correct channel parameters to ensure viable products. This work describes an analytic dielectric modeling methodology...
The present paper investigates the power supply noise in multilayered IC packages and analyzes the effect of shorting vias. A full wave code, based on the Finite Integration Technique (FIT), is used for the numerical simulations and it is validated by means of measurements. Furthermore two different solvers are employed to verify the accuracy of the proposed model: time domain and frequency domain...
In this contribution we discuss the translation-invariant interpolation of frequency domain functions by means of a well-conditioned Gaussian-modulated pole kernel which generates exclusively stable poles. For the implementation we use an adaptive interpolation process which is a variant of a recently introduced adaptive residual subsampling method. It is shown that the interpolation process with...
The developed concept of ultra low power multi gigabit serial interface for mobile devices removes limits from mechanical design and device architectures. Power consumption of differential line drivers were reduced to 0.8 mW by lowering common-mode voltage of signals to 200 mV and using voltage source type drivers with 50-ohm output impedance to generate +-200 mV high-speed differential signal to...
This paper presents a new technique for the elimination of passivity violations in linear lumped macromodels. The main algorithm is based on the perturbation of imaginary eigenvalues of suitably-defined Hamiltonian matrices, as documented in the existing literature. We introduce a modification aimed at the minimization of the relative error in the model responses during the passivity enforcement....
Residue perturbation (RP) is often used a means for enforcing passivity of rational models. One RP version combines a least squares problem with a constraints part and solves via quadratic programming (QP). A major difficulty is that commonly available QP solvers cannot utilize the problem sparsity, leading to lengthy computations. This paper proposes to take the eigenvalues of the residue matrices...
We present a systematic way of performing sensitivity analysis on on-chip power distribution grids. By using factor analysis we are able to uncover correlations between power grid design variables and power supply noise. From our analysis of 300 different grids in a 65-nm process, we can identify which power grid design variables have both high correlation to and high impact on noise; the most important...
Transient simulation using Laguerre polynomials is an unconditionally stable method, where the time-step is not limited by the fine resolution of the model. In this paper, a circuit model of the 3D FDTD grid for transient simulation using Laguerre polynomials has been derived. The circuit model enables FDTD simulation with Laguerre polynomials using the Spice MNA engine. In addition, circuit models...
The large number of ports in an interconnect structure is a critical limiting factor when applying model order reduction. This is due to the fact that the size of the reduced model grows rapidly with increasing the number of ports, leading to large and dense circuit matrices. To address this problem, a new method for model order reduction based on transverse partitioning and waveform relaxation is...
Next-generation nano-scale RFIC designs have an unprecedented complexity and performance that will inevitably lead to costly re-spins and loss of market opportunities. In order to cope with this, the aim of the European Framework 6 CHAMELEON RF project is to develop methodologies and prototype tools for a comprehensive and highly accurate analysis of complete functional IC blocks. These blocks will...
This paper addresses high-speed interconnects in high density systems (systems on chip (SoC) in package (SiP) ...). These lines (of microstrip or coplanar type) often have an underlayer of orthogonal metal grids which can affect transmission characteristics. We subsequently present a characterization through S-parameter measurements and electromagnetic simulations. Two kinds of grid are studied; grounded...
In this paper, we propose a technique to compensate the propagation delay and losses in VLSI interconnects by using negative group delay (NGD) active circuits. This study uses the RLC models of interconnect lines currently considered in VLSI circuits. The circuit proposed here is based on a cell consisting of a Field Effect Transistor (FET) in parallel with a series RL passive network. We also describe...
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