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This paper presents a methodology for the design of a CMOS low-noise amplifier (LNA) operating at 5.5GHz. As an example, the design of a narrow-band cascode LNA intended for WiMax application in the frequency range from 5-6GHz is analyzed, using an 120nm CMOS technology. Trade-offs in the design, such as noise figure, gain, linearity are explored, based on the inversion coefficient and channel length...
A complete new adaptive tuneable filter system is designed and simulated. This is based on controlling the centre frequency (fo) and quality factor (Q) of a bandpass filter through two electrical tuning circuits. The two circuits automatically correct the filter parameters, via variable resistors, in order to adjust fo and Q of the circuit. High accuracy and performance are achieved since this adaptive...
This paper investigates the exponential stability of a class of delayed cellular neural networks (DCNN's). By means of appropriately dividing the network state variables into several subgroups, the new sufficient exponential stability condition is derived by constructing Liapunov functional and using the method of the variation of constant. The condition suitable is associated with some initial values...
Multimedia applications such as video and image processing are computation intensive applications. For these applications the bit-width of data and operations is different all over the application. Generating optimized architectures is not an obvious task since it requires a deep bit-width analysis in order to properly size hardware resources. Furthermore implementing several application profiles...
In this paper we present a system simulation tool (SST) to analyze the performances of orthogonal frequency division multiplexing (OFDM) ultra-wideband (UWB) receiver. The non-linear receiver RF front-end operates in presence of adjacent channel interferers. The RF front-end signal to noise ratio (SNR) and the third order inter-modulation products (IIP3) are considered and their effects on the bit...
This paper presents a novel low complexity, constant envelope UWB communication system for personal network and sensor network applications: FM-UWB. FM-UWB uses double FM: digital FSK followed by high modulation index analog FM to create a constant envelope UWB signal. FDMA techniques at the sub-carrier level may be exploited to accommodate multiple users. A wideband delay line FM demodulator that...
High performance VLSI-based FFT architectures are key to signal processing and telecommunication systems since they meet the hard real-time constraints at low silicon area and low power compared to CPU-based solutions. In order to meet these goals, this paper presents a novel VLSI FFT architecture based on combining three consecutive radix-4 stages to result in a 64-point FFT engine. Cascading these...
The most efficient technique, based on LC ladder filtering, providing wide input matching in UWB LNA is first reviewed. Implemented with integrated inductors in a cascode topology, the circuit covers the 6 to 10 GHz upper frequency of European UWB and achieves an 8 dB maximum gain and 7.5 dB minimum noise figure for a 9 mW power consumption. A transformer implementation of this Inductive Degeneration...
Accurate prediction of exons in eukaryotic genes requires methods for exact acceptor and donor splice site prediction. In this paper, we report on a combination of a digital signal processing (DSP) technique and a data-driven statistical technique for the recognition of acceptor splice sites. The proposed hybrid method and the existing statistical techniques were compared on standard human datasets...
Video technology evolution has boosted the need for the H.264/AVC encoder with real-time performance. In order to meet such need the present paper presents a VLSI H.264/AVC encoder architecture and the relevant details on design and implementation of the specific modules. The encoder design complies with the reference software encoder of the standard and follows the baseline profile level 3.0. The...
Processes of color image segmentation are crucial for the image interpretation. Thus, many techniques give very good results. However it is relatively difficult to standardize the segmentation algorithm by considering the variability between images: a limit of segmentation performance. In this paper, our goal is to present a method of inter-images variability reduction, by using the colorimetric context...
This paper presents a new current monitoring circuit that detects faults using the current testing technique in CMOS integrated circuits. This circuit employs cross-coupled PMOS transistors, it is used as a current comparator. The proposed circuit is a negligible impact on the performance of the circuit under test (CUT). In addition, no extra power dissipation and high-speed fault detection are achieved...
Intelligent diagnosis systems represent nowadays important technical means in the medical field and particularly in cardiology. In such a field where uncertainty is always present, classical techniques of classification show a lack of efficiency thus leading to erroneous results. Fuzzy logic proved to be a suitable method for classification problems, particularly in cardiology. This paper aims to...
This paper addresses the use of Arithmetic Transforms (AT) and its extensions to express word-level quantities and sequential elements. Their applications cover equivalence checking and component matching. Compositional construction of an overall circuit becomes critical. In order to facilitate the compositions, novel algorithms are proposed to get high performance and experiments prove their efficiency.
For instrumental implementation of biochemical microanalysis techniques, we have designed a CMOS BDJ (buried double p-n junction) detector array and its associated charge amplifiers. The adopted amplifier configuration allows a high-sensitivity performance (100 V/lx.s@555 nm). The detector chip can operate in low-bias and low-temperature conditions, so as to lower the dark currents of the detector...
We present a miniaturization technique for square dual-mode resonators. By using the Minkowski fractal iteration it is possible to obtain compact resonators. Furthermore the second harmonic is highly attenuated, thus enhancing the rejection in the upper band. A 4th order filter using two dual-mode fractal resonators has been fabricated to illustrate these results. We use the suspended substrate technology...
This paper presents a simplified version of the retinex image processing algorithm. A strong reduction of the complexity of the algorithm in terms of operations required and bit resolution of the elaboration has been obtained keeping the quality of the results acceptable. The algorithm has been implemented on different FPGAs and used in real time applications.
The increasing complexity of System-on-Chip (SoC) and time-to-market constraints raise new methodological issues. To address these issues, this paper introduces a UML-based SoC modeling approach mixing simulation and formal verification techniques. A UML profile called DIPLODOCUS has been specified. Transformation rules were defined for generating from UML models either a SystemC model or a formal...
A novel design approach combining Wave Pipelining and Self Reset Logic provides an elegant solution at high speed data throughput with significant savings in power and area as compared with other dynamic CMOS Logic implementations.
A current mode active inductor multiplier is obtained using the Miller capacitor by the dual circuit generation technique. To apply the active inductor multiplier to the filters and oscillators, a bi-directional CCCS and multiplication factor control circuit for the variable active inductor multiplier circuit are reported. Furthermore, the power efficiency and quality factor of the inductor are discussed...
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