In the evolving field of Internet of Things (IoT), wireless sensor networks serve as the backbone for data acquisition, processing, and transmission. Deployed sensor nodes are expected to communicate with one another, or with a base station. A new modulating scheme known as LoRa allows communication over long ranges but still consumes low power. One block that is needed to realize this is the analog-to-digital converter (ADC). This paper designed a Sigma-Delta ADC due to its high resolution and relatively low power consumption among other ADCs. Four topologies were implemented to survey which one will give the best performance. Finally, the first-order continuous-time sigma-delta ADC was found to be the best topology. It can accept an input amplitude range of 350uV to 500mV and frequency range of up to 39MHz. Lastly, the measured least significant bit is 0.0708mV with a low power of 1.44mW.