The paper presents a 24 V chopper offset-stabilized operational amplifier with symmetrical RC notch filters, having a 4–24 V supply range, and being realized using a 0.25 ßm BCD process. The amplifier has a typical offset voltage of 1.2 μV, a minimum PSRR of 128 dB, a minimum CMRR of 120 dB, a minimum open-loop gain of 134dB, a noise PSD of 30 nV/√Hz, 1.8 MHz unity gain bandwidth, and THD + noise of 0.0004 % at 1 kHz, while consuming 500 μΑ. The chopping frequency is 250 kHz. The input chopping clock phases are obtained using a level shifter. Using minimum sized isolated NMOS transistors as switches, the input current was reduced down to maximum 100pA at room temperature.