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article

Rebooting Computing: The Road Ahead

Thomas M. Conte, Erik P. DeBenedictis, Paolo A. Gargini, Elie Track

Computer > 2017 > 50 > 1 > 20 - 29

The IEEE Rebooting Computing Initiative, proposed in 2012, has launched a 15-year technology roadmap to address escalating computing-performance pressures: stalled device-physics advances coupled with big data demands, novel machine-learning problems, and complex software paradigms. Potential solutions range from new transistor technology to quantum computing.

article

Lessons Learned from Optimizing Science Kernels for Intel's "Knights Corner"' Architecture

Jack Deslippe, Brian Austin, Chris Daley, Woo-Sun Yang

Computing in Science & Engineering > 2015 > 17 > 3 > 30 - 42

Optimizing the codes and kernels representing the National Energy Research Scientific Computing Center's workload on the Knights Corner architecture helped pave the path for NERSC's newest machine. Cori will use the next generation of Intel Xeon Phi processors: Knights Landing.

article

Prototyping the recursive internet architecture: the IRATI project approach

Sander Vrijders, Dimitri Staessens, Didier Colle, Francesco Salvestrini, more

IEEE Network > 2014 > 28 > 2 > 20 - 25

In recent years, many new Internet architectures are being proposed to solve shortcomings in the current Internet. A lot of these new architectures merely extend the current TCP/IP architecture and hence do not solve the fundamental cause of these problems. The Recursive Internet Architecture (RINA) is a true new network architecture, developed from scratch, building on lessons learned in the past...

chapter

IEEE Standard for Modeling and Simulation (M&S) High Level Architecture (HLA)-- Federate Interface Specification

IEEE Std 1516.1-2010 (Revision of IEEE Std 1516.1-2000) > 1 - 378

The High Level Architecture (HLA) has been developed to provide a common architecture for distributed modeling and simulation. The HLA defines an integrated approach that provides a common framework for the interconnection of interacting simulations. This document, the second in a family of three related HLA documents, defines the standard services of and interfaces to the HLA runtime infrastructure...

chapter

To GPU synchronize or not GPU synchronize?

Wu-chun Feng, Shucai Xiao

Proceedings of 2010 IEEE International Symposium on Circuits and Systems > 3801 - 3804

2010 IEEE International Symposium on Circuits and Systems. ISCAS 2010

The graphics processing unit (GPU) has evolved from being a fixed-function processor with programmable stages into a programmable processor with many fixed-function components that deliver massive parallelism. By modifying the GPU's stream processor to support “general-purpose computation” on the GPU (GPGPU), applications that perform massive vector operations can realize many orders-of-magnitude...

article

Investigating memory prefetcher performance over parallel applications: From real to simulated

Valéria S. Girelli, Francis B. Moreira, Matheus S. Serpa, Danilo Carastan‐Santos, more

Concurrency and Computation: Practice and Experience > 33 > 18 > n/a - n/a

Memory prefetcher algorithms are widely used in processors to mitigate the performance gap between the processors and the memory subsystem. The complexities behind the architectures and prefetcher algorithms, however, not only hinder the development of accurate architecture simulators, but also hinder understanding the prefetcher's contribution to performance, on both a real hardware and in a simulated...

article

Short-term air pollution forecasting based on environmental factors and deep learning models

Mirche Arsov, Eftim Zdravevski, Petre Lameski, Roberto Corizzo, more

Annals of Computer Science and Information Systems > 2020 > Vol. 21 > 15--22

The effects of air pollution on people, the environment, and the global economy are profound - and often under-recognized. Air pollution is becoming a global problem. Urban areas have dense populations and a high concentration of emission sources: vehicles, buildings, industrial activity, waste, and wastewater. Tackling air pollution is an immediate problem in developing countries, such as North Macedonia,...

article

High-Performance System-on-Chip-Based Accelerator System for Polynomial Matrix Multiplications

Server Kasap, Soydan Redif

Circuits, Systems, and Signal Processing > 2019 > 38 > 12 > 5755-5785

Polynomial matrix computations, such as polynomial matrix multiplication (PMM) and eigenvalue factorization of parahermitian matrices, have played an important role in a growing number of applications, in recent times. However, the computational complexity and expense of such operations impose a profound limit on their applicability. In a recent paper, we introduced a systolic array-based parallel...

article

Digital Works jako narzędzie wspomagające kształcenie inżynierów informatyki w zakresie symulacji cyfrowych układów logicznych

KONRAD GAUDA

Edukacja-Technika-Informatyka > 2019 > 10 > 3 > 251-256

W artykule poruszone są zagadnienia związane z miejscem i rolą architektury komputerów w procesie kształcenia informatycznego studentów. W dalszej części ukazane są przykładowe możliwości wykorzystywania aplikacji Digital Works w zakresie projektowania, budowy i symulacji cyfrowych układów sekwencyjnych.

article

Maszyna W - jak zaprojektować prosty rozkaz

Alina Momot, Robert Tutajewicz

MINUT Matematyka i Informatyka na Uczelniach Technicznych > 2019 > Nr 1 > 24-35

Budowa współczesnych komputerów jest niezwykle skomplikowana, jednakże w większości przypadków ich podstawowa architektura opiera się na założeniach sformułowanych przez Johna von Neumanna, Johna W. Mauchly'ego oraz Johna Presper Eckerta w 1945 roku. Tak więc, aby zrozumieć podstawowe zasady działania komputera wystarczy prosty model komputera zaprojektowany w ten sposób, aby spełniał te założenia...

article

On the improvement of the teaching quality and learning effectiveness in the computer organization course through FPGA and modular centered microcomputer design

Halit Oztekin, Feyzullah Temurtas, Ali Gulbag

Computer Applications in Engineering Education > 26 > 5 > 1825 - 1840

This manuscript focuses on the results of a project study on the field programmable gate array (FPGA) and modular based microcomputer architecture design for improving the teaching and learning effectiveness in computer organization course and similar courses. The design mentioned in this manuscript is a unique system allowing to students to directly write their program and/or include their own designs...

article

Blockchain-based mobile fingerprint verification and automatic log-in platform for future computing

Jun-Ho Huh, Kyungryong Seo

The Journal of Supercomputing > 2019 > 75 > 6 > 3123-3139

Door locks and user authentication are the major issues in the current banking industry. There are a number of user future computing techniques, and security is especially essential to these methods. Existing digital door locks have the problem of opening easily with a stolen PIN number or by electrical shock. Thus, this study proposed and implemented an integrated automatic log-in platform based...

article

The task of building a trusted computing environment on the Intel hardware platform

A. Yu. Chernov, A. S. Konoplev, D. V. Reshetov

Automatic Control and Computer Sciences > 2017 > 51 > 8 > 844-847

The problem of building a trusted computing environment on the basis of modern computing devices has been considered. The main features of software execution at different levels of privilege have been indicated. The architecture of the Intel ME subsystem has been considered. The potential threats of Intel ME technology have been highlighted, and possible ways to eliminate them have been given.

article

Dropping Activation Outputs With Localized First-Layer Deep Network for Enhancing User Privacy and Data Security

Hao Dong, Chao Wu, Zhen Wei, Yike Guo

IEEE Transactions on Information Forensics and Security > 2018 > 13 > 3 > 662 - 670

Deep learning methods can play a crucial role in anomaly detection, prediction, and supporting decision making for applications like personal health-care, pervasive body sensing, and so on. However, current architecture of deep networks suffers the privacy issue that users need to give out their data to the model (typically hosted in a server or a cluster on Cloud) for training or prediction. This...

article

Predictive Approach for Sensorless Bimanual Teleoperation Under Random Time Delays With Adaptive Fuzzy Control

Zhenyu Lu, Panfeng Huang, Zhengxiong Liu

IEEE Transactions on Industrial Electronics > 2018 > 65 > 3 > 2439 - 2448

Robot teleoperation techniques are applied in industrial automation, space, and surgery. Considering the high cost of force–torque (F/T) sensors, an “indirect estimation” of the external force is preferable to “direct sensing” of the force. This study provides a predictive control method for a bimanual teleoperation system without F/T and acceleration sensors. Two types of mirror predictors are built...

article

Single-Inductor Multioutput-Level Buck Converter for Reducing Voltage-Transition Time and Energy Overheads in Low Power DVS-Enabled Systems

Santanu Kapat, V. Inder Kumar

IEEE Transactions on Power Electronics > 2018 > 33 > 3 > 2254 - 2266

Dynamic voltage scaling (DVS) is a useful technique to optimize performance and efficiency of CMOS digital processors using dc–dc converters that require to meet extremely fast slew rate demand. However, there exist conflicting design criteria in existing DVS power supply architectures. This paper proposes a single-inductor multioutput-level buck converter for low power DVS-enabled systems. Under...

article

Tropical Cyclone Intensity Estimation Using a Deep Convolutional Neural Network

Ritesh Pradhan, Ramazan S. Aygun, Manil Maskey, Rahul Ramachandran, more

IEEE Transactions on Image Processing > 2018 > 27 > 2 > 692 - 702

Tropical cyclone intensity estimation is a challenging task as it required domain knowledge while extracting features, significant pre-processing, various sets of parameters obtained from satellites, and human intervention for analysis. The inconsistency of results, significant pre-processing of data, complexity of the problem domain, and problems on generalizability are some of the issues related...

article

A Reconfigurable and Scalable FPGA Architecture for Bilateral Filtering

Swapnil Deelip Dabhade, G. N. Rathna, Kunal Narayan Chaudhury

IEEE Transactions on Industrial Electronics > 2018 > 65 > 2 > 1459 - 1469

Bilateral filter is an edge-preserving smoother that has applications in image processing, computer vision, and computational photography. In the past, field-programmable gate array (FPGA) implementations of the filter have been proposed that can achieve high throughput using parallelization and pipelining. An inherent limitation with direct implementations is that their complexity scales as

$O(\omega ^2)$

...

article

A Novel 1-D Convolution Neural Network With SVM Architecture for Real-Time Detection Applications

S. Lekha, M. Suchetha

IEEE Sensors Journal > 2018 > 18 > 2 > 724 - 731

To enhance the performance and sensitivity of continuous monitoring systems for detection of chronic diseases, selection of optimal machine learning algorithms is pivotal. Presently, the commonly used algorithms face constraints, such as high computational cost and lack of optimal feature selection on application to real time signals thereby reducing the efficiency of such analysis. Deep learning...

article

Automatic Facial Expression Recognition System Using Deep Network-Based Data Fusion

Anima Majumder, Laxmidhar Behera, Venkatesh K. Subramanian

IEEE Transactions on Cybernetics > 2018 > 48 > 1 > 103 - 114

This paper presents a novel automatic facial expressions recognition system (AFERS) using the deep network framework. The proposed AFERS consists of four steps: 1) geometric features extraction; 2) regional local binary pattern (LBP) features extraction; 3) fusion of both the features using autoencoders; and 4) classification using Kohonen self-organizing map (SOM)-based classifier. This paper makes...

INFONA - science communication portal

Search results

Rebooting Computing: The Road Ahead

Lessons Learned from Optimizing Science Kernels for Intel's "Knights Corner"' Architecture

Prototyping the recursive internet architecture: the IRATI project approach

IEEE Standard for Modeling and Simulation (M&S) High Level Architecture (HLA)-- Federate Interface Specification

To GPU synchronize or not GPU synchronize?

Investigating memory prefetcher performance over parallel applications: From real to simulated

Short-term air pollution forecasting based on environmental factors and deep learning models

High-Performance System-on-Chip-Based Accelerator System for Polynomial Matrix Multiplications

Digital Works jako narzędzie wspomagające kształcenie inżynierów informatyki w zakresie symulacji cyfrowych układów logicznych

Maszyna W - jak zaprojektować prosty rozkaz

On the improvement of the teaching quality and learning effectiveness in the computer organization course through FPGA and modular centered microcomputer design

Blockchain-based mobile fingerprint verification and automatic log-in platform for future computing

The task of building a trusted computing environment on the Intel hardware platform

Dropping Activation Outputs With Localized First-Layer Deep Network for Enhancing User Privacy and Data Security

Predictive Approach for Sensorless Bimanual Teleoperation Under Random Time Delays With Adaptive Fuzzy Control

Single-Inductor Multioutput-Level Buck Converter for Reducing Voltage-Transition Time and Energy Overheads in Low Power DVS-Enabled Systems

Tropical Cyclone Intensity Estimation Using a Deep Convolutional Neural Network

A Reconfigurable and Scalable FPGA Architecture for Bilateral Filtering

A Novel 1-D Convolution Neural Network With SVM Architecture for Real-Time Detection Applications

Automatic Facial Expression Recognition System Using Deep Network-Based Data Fusion

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