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This paper presents a novel generic weak classifier for object detection called "Square Patch Feature". The speed and overall performance of a detector utilising Square Patch features in comparison to other weak classifiers shows improvement. Each weak classifier is based on the difference between two or four fixed size square patches in an image. A pre-calculated representation of the image...
Despite the latest improvements in the microarray technology, many developments are needed particularly in the image processing stage. Some hardware implementations of microarray image processing have been proposed and proved to be a promising alternative to the currently available software systems. However, the main drawback is the unsuitable addressing of the quantification of the gene spots which...
This paper proposes a high-performance intra prediction architecture that can support H.264/AVC high profile. The proposed MB/block co-reordering can avoid data dependency and improve pipeline utilization. Therefore, the timing constraint of real-time 4k×2k encoding can be achieved with negligible quality loss. 16×16 prediction engine and 8×8 prediction engine work parallel for prediction and coefficients...
The background identification methods are used in many fields like video surveillance and traffic monitoring. In this paper we propose a hardware implementation of the Gaussian Mixture Model algorithm able to perform background identification on HD images. The proposed circuit is based on the OpenCV implementation, particularly suited to improve the initial background learning phase. Bit-width has...
Fingerprint orientation image, also called directional image, is a widely used method in fingerprint recognition. It helps in classification (accelerating fingerprint identification process) as well as in preprocessing or processing steps (such as fingerprint enhancement or minutiae extraction). Hence, efficient storage of directional image-based information is relevant to achieve low-cost templates...
In this paper, we propose a novel architecture to accelerate the Speeded Up Robust Features (SURF) algorithm by the use of configurable hardware. SURF is used in optical tracking systems to robustly detect distinguishable features within an image in a scale and rotation invariant way. In its performance critical part, SURF computes convolution filters at multiple scale levels without the need to create...
In this paper, we propose a Mixed Signal Parallel Multi 1Dimensional Block Matching Algorithm (MSPM-1D-BMA) based motion estimation (ME) processor. In contrast to the typical 2Dimensional full search block matching algorithm (2DFSBMA), the MSPM-1D-BMA based ME processor will greatly reduce the number of data movements in between memories. We employ a voting algorithm in the proposed ME processor to...
Bidirectional motion estimation is an efficient algorithm which can solve the problem of holed and overlapped regions for motion compensated frame interpolation in frame rate up-conversion applications. This paper proposed an efficient VLSI architecture for this algorithm using multi-resolution frames to reduce the hardware resource. The initial motion vectors (MVs) in bidirectional motion estimation...
This paper designs a reconfigurable video MTD IP core, which established in XUP Virtex-II Pro development system platform. The design takes System Generator for the development tool, which is a system-level modeling tool developed by Xilinx Inc, to built a reconfigurable video MTD algorithm in MATLAB/Simulink environment, which is available for the FPGA platform. Then the algorithm is solidified as...
This paper describes mixed constrained image filter design with fault tolerant using Genetic Algorithm (GA) on a reconfigurable processing array. There may be some faulty Configurable Logic Blocks (CLBs) in a reconfigurable processing array at random. The proposed method with GA autonomously synthesizes a filter fitted to the reconfigurable device with some faults, evaluating the complexity, power...
This paper presents a new algorithm for nighttime contrast enhancement. The proposed algorithm modifies the traditional histogram equalization algorithm to maintain the color information of the original nighttime images. The algorithm has a low computational cost that makes it suitable for real-time hardware implementation. In addition, its efficient hardware implementation is detailed on a Xilinx...
This paper proposes an embedded vision system for real-time moving object tracking using modified mean-shift algorithm for mobile robot application. This design of modified mean-shift algorithm fully utilizing the advanced parallelism of Field Programmable Gate Arrays (FPGA) is capable of processing real-time PAL video of 720*576 at 25 fps. This hardware implementation realizes time-consumed color...
This paper describes an efficient hardware architecture for the deblocking filter used in H.264/AVC baseline profile video coding standard and optimized for real time implementation. Thus, the deblocking filter is a computationally and data intensive tool resulting in an increased execution time of both encoding and decoding processes. In fact, the processing order of the filter and the memory organization...
While the computational power of Field Programmable Gate Arrays (FPGA) makes them attractive as code accelerators, the lack of high-level language programming tools is a major obstacle to their wider use. Graphics Processing Units (GPUs), on the other hand, have benefitted from advanced and widely used high-level programming tools. This paper evaluates the performance, throughput and energy of both...
This paper presents an algorithm of line antialiasing based on coordinate system rotation. The line direction for drawing is changed to horizontal or vertical one in new coordinate system. A pixel is divided into 16 grids. The weight of the grid point is the number of the grids which the point is in. The ratio of area is concluded by judging the position relationship of pixel grids and expanded rectangle...
An efficient VLSI architecture of motion compensation of MPEG-4 is presented in this paper. Aiming at the memory accessing problem of the motion compensation, three special methods were adopted. First, a novel interpolation pixel buffering mechanism and the corresponding parallel interpolation structure were proposed to save the buffering storage consumption of the interpolation pixels distinctly...
This paper describes an FPGA-based system capable of computing the distance of objects in a scene to two stereo cameras, and use that information to isolate objects in the foreground. For this purpose, four disparity maps are generated in real time, according to different similarity metrics and sweep directions, and then merged into a single foreground-versus-background bitmap. Our main contribution...
In order to detect the location of smoke in the Measuring System for Ground Shell Dispersion (MSGSD), presented an improved algorithm for the Background Subtraction. Focused on introducing design of the image detection algorithm. The results show that the system can quickly, accurately and effectively detect the location of the smoke.
This paper presents an intelligent video surveillance system. The system is composed of one or more nodes flexibly according to the application scenarios such as private properties, banks and museums. Each node is an autonomous vision-based device capable to perform intelligent tasks. It is able to digitize and compress the acquired analog video signals in MPEG-4 standard and then transmit the compressed...
The coarse-grained reconfigurable image stream processor (CRISP) architecture is introduced for the image processing demands of high-definition (HD) cameras and camcorders. With several architectural concepts of the reconfigurable architecture, the CRISP architecture is proposed to meet the performance and flexibility requirements of the HD cameras. A multi-frame processing system with CRISP is implemented...
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