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Long range low power is a family of technologies promising to connect thousands of sensors to the future internet of things. Within this family of possible technology choices, two different branches have emerged: the standards based on spreaded wideband communication and the standards based on narrowband communication, both promising to reach long range connectivity at very low power. More specifically,...
Cyclically-coupled quasi-cyclic LDPC (CC-QC-LDPC) block codes have been shown to achieve outstanding bit error performance with extremely low error floor. In this paper, we propose two new types of CC-QC-LDPC block codes which can achieve a larger girth. We present the error performance of the CC-QC-LDPC codes constructed by the new mechanism. We show that with similar codelengths, the new codes outperform...
In this paper, we propose a full-duplex denoise-and-forward two-way relaying (FDNF-TWR) scheme with differential binary phase-shift keying (DBPSK) modulation, which do not need instantaneous channel state information. In the proposed scheme, two full-duplex source nodes exchange their information with the help of one full-duplex relay node. A non-coherent relay decoder takes the residual self-interference...
Gradient descent bit-flipping (GDBF) decoding for low-density parity-check (LDPC) codes has gained great attentions because of low complexity and relatively good performance. However, the performance of the GDBF decoding is still much poorer than that of the MS algorithm. To further improve the performance, the iterative decoding process is introduced to GDBF decoding in this paper. At the end of...
In this paper, we propose a new approach to construct quasi-cyclic low-density parity-check (QC-LDPC) codes using Hamming codewords of weight three, namely the HM-QC-LDPC codes. Thanks to the distance property of Hamming codes, length four cycles are avoided from the Tanner graph of the constructed codes, resulting in codes of girth six. This approach can be further extended to construct QC-LDPC codes...
Non-binary One Step Majority Logic decodable (OSMLD) codes have several advantages over their binary counterparts but unfortunately their decoding complexity is significantly challenging. In this paper, we propose two contributions. Our first contribution is to use the Majority-Logic Decoding (MLGD) algorithm for non-binary cyclic OSMLD codes, since it involves only finite field addition and multiplication,...
In this paper, the turbo principle is applied to the existing least symbols error rate(LSER) decision feedback equalization(DFE) for underwater channel. The performance of the DFE adaptive algorithms are aided by soft information delivered from the channel decoder. We introduce a variable step size scheme that takes soft information into account to get the more suitable step size which can reduce...
The article describes an innovative bit error rate reduction technique principle and its practical implementation. The design of the technique is implemented in an FPGA and is combined with other more conventional BER reduction techniques, such as Reed-Solomon coding. Experimental results are provided. The application bit rate in function of BER for both reliable (TCP) and unreliable (UDP) mode of...
In this paper we consider a novel design of space-time block code combined with pre-coding module transmission system. Theory of orthogonal designs has shown that such code cannot be simultaneously orthogonal, of rate 1, with full diversity order, for more than 2 transmit antennas. We propose in this paper a new way to overcome this limitation by adding a pre-coding module before transmitting space-time...
Document is unavailable: This DOI was registered to an article that was not presented by the author(s) at this conference. As per section 8.2.1.B.13 of IEEE's "Publication Services and Products Board Operations Manual," IEEE has chosen to exclude this article from distribution. We regret any inconvenience.
Document is unavailable: This DOI was registered to an article that was not presented by the author(s) at this conference. As per section 8.2.1.B.13 of IEEE's "Publication Services and Products Board Operations Manual," IEEE has chosen to exclude this article from distribution. We regret any inconvenience.
This paper presents a new dynamic and fully generic implementation of a Successive Cancellation (SC) decoder (multi-precision support and intra-/inter-frame strategy support). This fully generic SC decoder is used to perform comparisons of the different configurations in terms of throughput, latency and energy consumption. A special emphasis is given on the energy consumption on low power embedded...
As higher and higher speeds are used in wireless appliance, error correction continues to pose a considerable design challenge. Turbo codes exhibit attainment, in terms of bit error probability, that is very close to the Shannon limit and can be efficiently achieved for high-speed use. Turbo encoders and decoders have been introduced, most of which are based on convolution encoding. Here each encoder...
A joint decoding strategy is proposed to reduce the time consumption of non-binary LDPC (NB-LDPC) decoding process. This strategy is based on the retention error characteristics of Multi-Level Cell (MLC) NAND flash memories. The raw bit error rate is estimated by an empirical formula of retention error increasing model. With the bit flip patterns caused by retention errors in a MLC NAND flash cell,...
Based on the lower density parity check matrices in approximate lower triangular form allowed by the IEEE P802.11n/D1.04 (Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications) standards, LabVIEW FPGA programming language was used in this study to construct an encoder with a contract advantageous in the implementation of the hardware circuit that can generate codewords...
Time-domain synchronous orthogonal frequency division multiplexing (TDS-OFDM) is widely recognized as an orthogonal frequency division multiplexing (OFDM) transmission scheme with high spectral effciency. However, it suffers from severe performance loss over strong frequency selective channels, thus has difficulty supporting high-order modulations such as 256 QAM. To improve the channel estimation...
LDPC was first proposed in 1962, after that considerable achievements have been made both in decoding algorithms and also in the structure of the decoder. In terms of decoding algorithm, from belief propagation (BP) to min-sum (MS), then normalized MS (NMS) and finally to a more performance oriented variable MS (VMS) algorithm. In terms of the decoder structure, there are mainly two, flooding and...
In this paper, we propose a new IP transmission architecture over optical fast frequency hopping code-division multiple-access (OFFH-CDMA) network capable of supporting multirate transmissions for applications in flexible optical access networks. The proposed network architecture is independent of the spreading code employed and does not require any new optical processing technology. The performance...
Polar coding has received a lot of consideration due to its nature of capacity achieving under various condition of coding. Low complexity is introduced by using successive cancelation decoding method. By using this large-error correction capacity is achieved for finite length of codes.in this work we propose a new approach for polar codes to achieve the better performance. Reduction of complexity...
Polar codes have become one of the most attractive topics in coding theory community because of their provable capacity-achieving property. Belief propagation (BP) algorithm, as one o f the popular approaches for decoding polar codes, has unique advantage of high parallelism but suffers from high computation complexity, which translates to very large silicon area and high power consumption. This paper,...
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