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Recent OpenGL ES 2.0 API Specification for embedded systems graphics operations requires programmable vertex shader and fragment shader to process vertex and pixel data. Calculation of dot-product for two vectors and transcendental functions for a scalar are two fundamental arithmetic operations in the vertex processing. Since some complicated arithmetic operations in binary number system (BNS) turn...
Data traffic keeps increasing dramatically in the connected world and it pushes hard on evolution of IO technology. As technology progress, a simple and high-speed unified interconnect becomes practical to support many different protocols. Light Peak (LPK) is a high-bandwidth, inexpensive optical interconnect technology developed by Intel for this purpose. Also, to meet versatile and ever changing...
Recently there has been a growing interest in models and methods targeted towards the design of video stream parallel processing, and the applications tend to be highly bursty and dependent parallel. As a result, the most existing models are not suitable for dealing with such system design. In this paper, we present an Event Count Model (ECM) to capturing the timing properties of video stream processing...
A new direction in short-range wireless applications has appeared in the form of high-speed data communication devices for distances of a few meters. Behind these embedded applications, a complex Hardware/Software architecture is built. Dependability is one of the major challenges in these systems. Obviously in such systems, the attribute reliability has to be investigated for various components and...
The growing demands on multimedia applications and high-speed high-quality telecommunication systems with real-time constrains oriented to portable, low power consumption, devices, have being driven technologies development, methodologies and design flows of embedded systems during the last years. Through the analysis of design methodologies and strategies facing multi-core, reconfigurability and...
Recognizing the strategic importance of embedded computing for industry and society, the European Commission formed, together with industry, academia, and national governments, the European technology platform ARTEMIS (Advanced Research and Technology for Embedded Intelligence and Systems) in 2004. It is one goal of ARTEMIS to develop a cross-domain embedded system architecture, supported by design...
This work is related to to System-On-A-Chip architectures and designs methodologies, for cryptographic algorithms implementations. Alternatives approaches are presented, for architecture and design methodologies for block ciphers, stream ciphers, and hash functions. The presented algorithms are the most wide used in all certain of modern applications. Implementations aspects are given for both ASIC...
Current embedded systems offer enough performance to integrate on a single chip jobs that required several distributed devices in the past. The execution environment of such an integrated architecture should satisfy key requirements, such as, temporal predictability, fault containment or flexibility. In this paper we present these requirements and argue about the suitability of embedded hypervisors...
This paper aims at introducing a methodology that allows an easy implementation of IP_Cores focusing only on their functionalities rather than their interfaces and their integration in a given architecture. The proposed approach implements all the communication infrastructure needed by a component described in VHDL, to be finally inserted into a real architecture that can be implemented on FPGAs,...
Internet of Things (IoT) consists of several tiny devices connected together to form a collaborative computing environment. IoT imposes peculiar constraints in terms of connectivity, computational power and energy budget, which make it significantly different from those contemplated by the canonical doctrine of security in distributed systems. In order to circumvent the problem of security in IoT...
This paper gives an overview of the model-based hardware generation and programming approach proposed within the MADES project. MADES aims to develop a model-driven development process for safety-critical, real-time embedded systems. MADES defines a systems modelling language based on subsets of MARTE and SysML that allows iterative refinement from high-level specification down to final implementation...
In this work we describe the first real world case study for the self-healing eDNA (electronic DNA) architecture by implementing the control and data processing of a Fourier Transform Spectrometer (FTS) on an eDNA prototype. For this purpose the eDNA prototype has been ported from a Xilinx Virtex 5 FPGA to an embedded system consisting of a PowerPC and a Xilinx Virtex 5 FPGA. The FTS instrument features...
Due to the continuous shrinking of the transistor sizes which is strongly driven by Moore's law, reliability becomes a dominant design challenge for embedded systems. Reliability problems arise from permanent errors due to manufacturing, process variations, aging as well as soft errors. As a result, the hardware will consist of unreliable components and hence, the development of embedded systems has...
Nowadays, computers are indispensable tools for most of everyday activities ranging from consumer electronics to industrial process automation. Complexity of new applications leads computer engineers to use embedded systems in order to develop high performance technological solutions that can achieve high speed processing while exploiting hardware resources efficiently. In order to develop embedded...
Over the last decade, a rapid development of embedded systems has enlarged their fields of application. Thus, several experiments have concentrated on the time and cost improvement. Certainly, the size of the cache memory influences the performance of embedded systems such as digital signature programs. The typical approach is to optimize as much as possible the size of the cache memory in designed...
The recent spectacular progress in modern Nan electronic technology enabled implementation of very complex multiprocessor systems on single chips (MPSoCs) and created a big stimulus towards development of MPSoCs for embedded applications. The increasingly complex MPSoCs are required to perform real-time computations to extremely tight schedules and to satisfy high demands regarding adaptability, as...
Evolutionary algorithms are another option for combinational synthesis because they allow for the generation of hardware structures that cannot be obtained with other techniques. This paper shows a parallel genetic programming (PGP) boolean synthesis implementation based on a low cost cluster of an embedded platform called SIE, based on a 32-bit processor and a Spartan-3 FPGA. Some tasks of the PGP...
Nowadays, hardware devices are meant to host the execution of many complex, multicore applications, whose functional and nonfunctional requirements vary according to the specific working domain. In this work, we propose a design methodology that combines an efficient reconfigurable architecture and a related mapping flow. In particular, the proposed island-based hardware architecture couples an efficient...
Current loop buffer has been mainly explored as an effective architectural technique for low-power execution in embedded processor. Another avenue, however, for exploiting loop buffer is to obtain its performance benefit. In this paper, we propose an application specific loop buffer organization for vectorized processing kernels, to achieve low-power and high-performance goals. The vectorized loop...
For many embedded systems, data protection is becoming a major issue. On those systems, processors are often heterogeneous and prevent from deploying a common, trusted hypervisor on all of them. Multiple native software stacks are thus bound to share the resources without protection between them. NoC-MPU is a Memory Protection Unit allowing to support the secure and flexible co-hosting of multiple...
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