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Semiconductor industry has recognized the need to replace traditional Al/SiO2 interconnects with Cu/Low-k interconnects in the mainstream electronics devices following the latter's impact on power, RC delay, and cross-talk reduction. However due to lower elastic modulus, strength, and poor adhesion characteristic, reliability of the Cu/Low-k interconnects turns out to be a concern for its integration...
Flip chip technology has attracted much attention in electronic industry as it fills the need for low cost, miniaturization and high performance requirements of electronic products. For such devices, package reliability under drop impact is a great concern to the manufacturers as these electronic packages are very much vulnerable to solder joint failures caused by the mechanical shock and the PCB...
The industry keeps driving further miniaturization of electronic packaging for portable and handheld products, and wafer level chip scaling package (WLCSP) has high potential to fulfill these requirements. Larger chip can accommodate more functions. However, fatigue failure of WLCSP solder joint caused by material coefficient of thermal expansion (CTE) mismatch is getting worse due to chip size increase...
This paper presents the design and modeling of the MEMS mechanical fatigue in the presence of stress raising notches. FEM models are realized to study the effect of notch geometric parameters on the stress concentration factor of the gold specimen subjected to tensile loading. Test structures with three different specimens, i.e. without notch, with single notch and with a double notch are modeled...
The development of 3D-silicon integrated circuits is an increasing demand especially regarding to advanced 3D-packages and high performance applications, with the intend to miniaturize and to reduce costs. Through-silicon-vias (TSV), interconnects and landing pads have a strong mismatch in proportions. Due to high temperature as well as high applied currents, the reliability of the systems and components...
The paper presents a novel hardware block that can be used for simultaneous generation of random bits and PUF responses. The new element called Universal Transition Effect Ring Oscillator (UTERO) is based on the TERO loop presented at CHES 2010. The PUF response bit corresponds to the output value of the TERO loop that converges to a state determined by the manufacturing process. The random bit is...
As NEM memory cells are scaled down for low operating voltage, high operating speed and high density, the stiction effects between a movable beam and charge-trapped layer become more significant. As stiction effects become stronger, release voltage becomes smaller which is problematic in terms of reliability. However, strong stiction effects also enable nonvolatile memory operation without the charge...
In this work we provide a first result of reliability of the finite element method for time-harmonic electromagnetic problems involving moving objects with stationary boundaries. In addition, by considering a simple geometry allowing the computation of a semi-analytical solution, we will provide a first error analysis for finite element solutions and a comparison with the same type of result for problems...
The paper reports compare of reliability between the chip scale package in MEMS devices with internal support structures and those without internal support structures in shock environments. We choose two kinds of chip scale packages of MEMS devices that meet requirements of analysis and experimental. By means of experiments, we obtained two kinds of chip scale packages structural parameters. And we...
The thermal fatigue reliability of solder bumps in TSV interposer package is analyzed by finite element method. The 3D finite element model of TSV interposer package is established in ANSYS software. Anand constitutive model is adopted to describe the viscoplastic behavior of Sn3.0Ag0.5Cu lead-free solder bumps. The influences of material properties and structural geometries on thermal fatigue reliability...
A DOE (Design of Experiment) methodology based on finite element analysis is presented to investigate thermal fatigue reliability of multi-row QFN packages. In this method, the influences of material properties, structural geometries and temperature cycling profiles on thermal fatigue reliability are evaluated, a L27(38) orthogonal array is built based on Taguchi method to figure out optimized factor...
Through-silicon via (TSV) technology known as the core of the next generation of 3D integration has drawn more and more attention. However, due to its high cost and yield problems, it has not been used widely. Nevertheless, TSV is becoming a main stream interconnect method for CIS (CMOS image sensors) packaging. In order to assess the reliability behavior of typical CMOS image sensor such as delamination...
TSV interposer packaging is one of the most important applications for TSV technology. However, the warpage and residual stress arising from the assembly process of TSV interposer have important influence on the reliability of the package. In this paper, two assembly processes were simulated by using the Finite Element Method, the evolution of the stresses and warpage during assembly were compared...
The dropping test of WLCSP with RDL on board-level was investigated by numerical method in this study. The asymmetric pattern of WLCSP devices mounted on the PCB board was considered. Using the finite element analysis, the stress and energy in the WLCSP with RDL was predicted under the dropping test conditions. The critical locations of WLCSP device on the PCB in the dropping test were identified...
With the current trend of cheaper, faster, and better electronic equipment, it has become increasingly important to evaluate the package and system performance very early in the design cycle using simulation tools [1]. Many studies have shown that the profile of temperature has a great impact on solder joint reliability. Undergoing the different temperature profile will get a different solder joint...
As one of the most promising technologies for future 3D IC integration, through silicon via (TSV) has gained wide attention. But its reliability issues are a great concern. This paper presents an analysis of the electric-thermo-mechanical reliability of TSV structures under high current stressing using finite element method (FEM). Based on the comprehensive analysis of the temperature, current density...
MEMS-based display with interferometric modulation (IMOD) is a new technology breakthrough that shows substantial performance, such as a significant reduction in power consumption, extending device battery life, no backlighting. The display consists of a suspended conductive membrane serving as a mirror over a partially reflective optical stack. In this paper, the mechanical response and the electrostatic...
ANSYS software was used to calculate the stress/strain distribution of ceramic quad flat package under thermal cycling. The results indicate that the stress distribution in solder joints were not uniform, the interface between lead and the heel of corner solder joint was the weakest position where the stress was hardly concentrated, the cracks should occur firstly at this point and then propagate...
Considering the influence of the cost, reliability and environment issues, the lead-free material of solder connection is paid more and more attention in integrated circuit packaging field. As the substitute of traditional solder, conductive adhesive has its own advantages. In this paper, a ball grid array (BGA) is chosen to illustrate the fatigue model for the methods of strain-based and energy-based...
As the demand grows for multiple functionality and high density, the reliability of plated through hole (PTH) becomes a concern because of the difficulty in small window plating. Choosing a favorable stress-strain model is an important part of PTH's reliability assessment. In this paper, the stress-strain model of Mirman and enhanced IPC (Association Connecting Electronics Industries) are considered...
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