The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This brief presents a low-dropout (LDO) voltage regulator without output capacitors that achieves fast transient responses by hybrid dynamic biasing. The hybrid dynamic biasing in the proposed transient improvement circuit is activated through capacitive coupling. The proposed circuit senses the LDO regulator output change so as to increase the bias current instantly. The proposed circuit was applied...
In this paper a fast transient response low-dropout regulator (LDO) based on a current feedback amplifier (CFA) is presented. The utilized CFA consists of an open-loop voltage follower with output local current-current feedback based on a level-shifted flipped voltage follower (LSFVF) to achieve high regulation and fast transient response. The inverting output buffer stage of the CFA together with...
In this paper a novel method for fast transient low power and high dropout DC-DC converter for embedded applications has been proposed. Fast transient is achieved by introducing one fast current control feedback loop with relatively slow current control feedback loop with a small Miller capacitor. Inner feedback loop is made faster by utilizing proposed push-pull structure of linear regulator. To...
A design of a low dropout voltage regulator (LDO) with fast settling response is being reported. This circuit is stable for full load current range from 0 to 150mA. A current boost circuit is being used to improve the transient response. There was an overshoot of mere 10.51mV and settling time achieved was 43.8ns. The PSRR achieved was -84.464dB upto 8.895kHz, and more than -70db till 136.218MHz....
This paper presents a novel topology for LDO regulators, improving load regulation with very low quiescent current. The core of the circuit is made by operating the pass transistor in the linear region, achieving an area reduction above 90%, reducing the gate capacitance and therefore improving loop response. The proposed structure to improve the load regulation is based on transconductance cells...
Modern power applications are driving the demand for power supply systems with fast transient response. A novel controlled slew-rate enhancement (CSRE) circuit for error amplifier in high frequency DC-DC converters is proposed to improve transient responds of DC-DC converters under large load current changes. The CSRE circuit with embedded current-detection is connected in parallel with the error...
This paper presents a dynamic voltage restorer based on a new firing control strategy for the three-phase six-switch voltage source inverter. In this firing control strategy, one of the three inverter legs is to be intentionally opened, one per time in a pre-planned sequence. This strategy combines the commonly used 180deg and 120deg conduction modes to generate a new operating mode, defined as 150deg...
An adaptive reference control (ARC) technique is proposed for minimizing overshoot/undershoot voltage and settling time of low-dropout regulators (LDO). Linear operation provided by ARC technique can dynamically and smoothly adjust the reference voltage for increasing slew rate of error amplifier and forcing output voltage back to its steady-state value rapidly. The amount of transient revision is...
This document presents a compilation of results from tests performed by iRoC Technologies on SER induced by alpha particles on SRAM memories for technology nodes from 180 nm to 65 nm. The aim of this study is to establish the variation of sensitivity with technology node for SEU and MCU, and to analyze the possible influence of different designs and technological parameters at a given technology node.
The implementation of complex functionality in low-power nano-CMOS technologies leads to enhance susceptibility to parametric disturbances (environmental, and operation-dependent). The purpose of this paper is to present recent improvements on a methodology to exploit power-supply voltage and temperature variations in order to produce fault-tolerant structural solutions. First, the proposed methodology...
Polymorphic gates can be considered as a new reconfigurable technology capable of integrating logic functions with sensing in a single compact structure. Polymorphic gates whose logic function can be controlled by the level of the power supply voltage (Vdd) represent a special class of polymorphic gates. A new polymorphic NAND/NOR gate controlled by Vdd is presented. This gate was fabricated and utilized...
A new integrated high voltage power PNP (IC ?? 600mA) has allowed to implement a very low drop (0.6V) voltage regulator withstanding ?? 80V transients. A trimmed (?? 2%) reference makes possible a precise "power on/off reset".
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.