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This paper presents GEMINI, an entire read-out System-on-Chip (SoC) to be used with the Triple Gas-Electron Multiplier (GEM) detector. Designed in CMOS 180 nm technology, GEMINI pushes towards the state-of-the-art for this peculiar detector front-end, as regards the count rate and detector pixel parasitic capacitance sustainability. It is composed of 16 channels, each performing a charge-to-voltage...
The present paper describes a time-based technique for resistive detector. Thanks to the comparison with a reference resistance, the circuit easily compensate the baseline contribution, thus extending the dynamic range of the measurement. The implemented circuit is based on a resistance to time converter followed by a time comparator for signal comparison. Differently from existing time-based technique,...
A fully integrated cost-effective and low-power single chip Lithium-Ion (Li-Ion) battery protection IC (BPIC) is proposed for portable devices. The control unit of the battery protection system and the MOSFET switches are integrated in a single package to prevent overcharge, overdischarge, and overcurrent of the Li-Ion battery. The BPIC supports low power standby mode and a new auto release function...
This paper presents the design details of newly developed high accuracy, compact, two axes Micro Digital Sun Sensor (Micro DSS) using linear Complementary Metal Oxide Semiconductor detector and N-shaped slit mask for Indian Satellite missions. Due to low mass, compact size and low power, the Micro Digital Sun Sensor is very much suitable for future micro/ nano-satellites as well as for communication...
A way of improvement of an oscillator concept, dedicated to detection and tracking of low energy particles with low fluxes, is presented. The solution is based on an indirect detection of the current generated at the input of the detection chain, through a Voltage Controlled Oscillator (VCO) response. In order to improve the correlation between the input current and the oscillator response (signal...
High-speed serial links integrated in advanced CMOS are ubiquitous in modern microprocessor systems. These commodity links have fixed performance specs and therefore realize the benefit of technology scaling in area and power reduction at high data rates. To realize significant scaling benefits, these designs must overcome the challenges associated with implementing analog functions in scaled logic-optimized...
The latest multiple-input multiple-output (MIMO) wireless systems have adopted iterative detection and decoding (IDD) to reduce the signal-to-noise ratio (SNR) required fora reliable transmission. An IDD system consists of a soft-in soft-out (SISO) detector to cancel interference, and a SISO forward-error correction (FEC) decoder to remove errors. The two blocks exchange soft information to improve...
In High speed operations the duty cycle of the clock signal is to be calibrated at 50%. But the variations in process, voltage and temperature (PVT) influences the duty cycle and make it difficult to calibrate the duty cycle at 50%. To overcome this deviation Pulse width control loops (PWCLs) are used. This work presents a highly reconfigurable and fast locking all digital pulse width control circuit...
This paper presents the design of a novel Phase Frequency Detector (PFD) and Charge Pump (CP) switching circuits for the frequency synthesizer in phase-locked loop (PLL). Our proposed PFD technique can eliminate the effect of missing edge and phase ambiguity problems in conventional PFDs circuit. Also, a novel CP circuit with a special switching scheme has been incorporated to reduce the current mismatch...
This work presents the first measured results for resonant AlN-based infrared (IR) detectors fabricated using a proprietary InvenSense AlN MEMS process. Resonators fabricated in the first fabrication run achieved high electromechanical performance with a Q of ∼1400 at 115 MHz, insertion loss of 17.9 dB, and a motional impedance of 670 Ω. The detectors are coated with an IR absorber layer (SiNx), and...
Fundamental and technological issues associated with the development and exploitation of the most advanced infrared and terahertz technologies are discussed. In these classes of detectors both photon and thermal detectors are considered. Special attention is directed to HgCdTe ternary alloys, type II superlattices, barrier detectors, uncooled thermal bolometers, extrinsic detectors (including blocked...
In this paper, we present the design of a variable frequency AC impedance measuring system. We have implemented this into an on-board module as well as into CMOS circuitry using TSMC 0.35μm 2P4M Mixed Mode Process. The circuit consists of high output impedance “load-in-loop” Voltage-Controlled Current Source (VCCS), a high Common — Mode Rejection Ratio (CMRR) and high input impedance Instrumentation...
This paper presents a THz imaging system composed of a signal source and a signal sensor in CMOS technology. The signal source integrates a 338 GHz oscillator in 40-nm CMOS and an antenna array on a Benzocyclobutene (BCB) carrier using the SoP (System-on-Package) technique. The measured EIRP achieves +8 dBm. The signal sensor is implemented in 0.18 μm CMOS. The measured maximum responsivity is 632...
A novel 8Gbps, 4:1 transition aware multiplexer (MUX) is proposed. The multiplexer core is basically a self-toggling TSPC flip-flop, which is deactivated when no data transition is detected. The high speed serial data is regenerated by gating the triggered clock. It combines the advantages of data retiming to eliminate deterministic jitter. Besides, the short clock-to-Qb delay enables high speed multiplexing...
This paper introduces a high frequency power detector with high conversion gain for frequency-shift applications. The proposed design comprises an amplitude-to-voltage converter (AVC), a peak detector, and a bandgap. To increase the operating frequency range, AVC utilizes the half of an RMS power detector to attain the power measure of an input signal. Since the input power is converted to a DC voltage...
We present a CMOS Charge Sensitive Amplifier (CSA) specifically designed for low capacitance pixel or silicon drift detectors for high resolution X-ray spectrometry. The intrinsic noise of the CSA has been measured at different operating temperatures with a triangular shaping with peaking time from 0.8 µs to 102 µs. At room temperature, the intrinsic Equivalent Noise Charge (ENC) shows a minimum of...
ePix100 is the first variant of a novel class of integrating pixel ASICs architectures optimized for the processing of signals in second generation LINAC Coherent Light Source (LCLS) X-Ray cameras. ePix ASICs are based on a common platform composed of a random access analog matrix of pixel with global shutter, fast parallel column readout, and dedicated sigma-delta analog to digital converters per...
The design and characterization of a CMOS 64×64 single-photon avalanche-diode (SPAD) array with in-pixel 11b time-to-digital converter (TDC) is presented. It is targeted for time-resolved imaging, in particular 3D imaging. The achieved pixel pitch is 64μm with a fill factor of 3.5%. The chip was fabricated in a 0.18μm standard CMOS technology and implements a double functionality: Time-of-Flight estimation...
A Colpitts mm-wave VCO is used for modulating and de-modulating high data rates using two modes of operation, enabling multi-Gbps transceiver with small size and low power. As a VCO 4 GHz tuning range is achieved with a peak output power of +5 dBm at 87 GHz and a phase noise of −93 dBc/Hz at 1 MHz offset. Gate bias modulation achieves up to 6 Gbps ASK modulation with only 9 mW power consumption. In...
A FET detector, fabricated in a standard CMOS technology and coupled to a bow-tie antenna is characterized in terms of spatial response by using a deconvolution method. An optical setup is used to produce a predictable impulse response. The resulting spatial response shows interaction with other structures present on the chip, while the measured shape is in agreement with the antenna effective area...
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