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In complementary input differential pair circuits, the topology CMOS uses both an nMOS differential pair and a pMOS differential pair connected in parallel however, it produces variations in the transconductance over the input common mode range. To avoid the problem of transconductance variations, a new structure, consists of two op-amps one n-type and the other p-type controlled by a digital control...
Dynamic spectrum access (DSA) supporting opportunistic transmission without extra spectrum bandwidth is attractive for future wireless communication. To facilitate such DSA system, a power-efficient (green) communication processor is needed to support extremely high speed operation on a power-limited mobile device. Traditional general-purpose and digital signal processors are unable to simultaneously...
In this work differentially coherent communication schemes for Impulse Radio Ultra-Wideband (IR-UWB) that transmit single uninterrupted package of energy per symbol, expected to be included in the IR-UWB IEEE 802.15.6 wireless Body Area Networks (BAN) standard are considered. Models for two receiver architectures, suitable for such communication schemes and feasible to implement in current CMOS technology...
In mobile and portable wireless devices, it is important to have low power dissipation so as to maximize battery life. As the overall power dissipation of a device is dominated by the radio frequency (RF) front end rather than the digital circuit, low-power RF front end design has become a very hot topic in both research and implementation. In this paper, we propose a design method to minimize the...
The growing energy footprint and environmental costs of information and communication technologies has created an awareness of the need for greener communications. However, the task of reducing the energy footprint of wireless infrastructure and terminals is daunting due to the requirements of flexibility and reconfigurability in emerging paradigms like 4G. This paper addresses the flexibility and...
The paper is reviewing the new trends of the image sensing, the Super CCDs and the Backlit CMOS. One proposes a new HDR fuzzy-interpolative algorithm that can extend the dynamic range of a still Backlit CMOS image in the Super CCD SR manner: the fusion of two images, the first one with a normal exposure and the other underexposed.
This paper presents the design and implementation of a 6 Gbps clock and data recovery (CDR) system for Serial Advanced Technology Attachment (SATA) standard. The CDR incorporates half rate phase detector and is realized using a 2 loop PLL consisting of a coarse loop and a fine loop. Fast frequency acquisition is acquired through coarse loop and fine phase alignment is performed through a half rate...
SOI FinFET transistors have emerged as novel devices having superior controls over short channel effects (SCE) than the conventional MOS transistor devices. However despite these advantages, these also exhibit certain other undesirable characteristics such as corner effects, quantum effects, tunneling etc. Usually, the corner effect deteriorates the performance by increasing the leakage current. In...
A 3.1-10.6 GHz ultra-wideband (UWB) low noise amplifier (LNA) utilizing a simple high-pass input matching network is proposed. The broadband matching and the flat gain are two important factors for the broadband circuits. Besides those factors, the minimal Noise Figure (NF), good linearity, and the lower power consumption are also desired. The LNA is designed in the standard 0.18μm CMOS technology...
In this paper, we introduced new methods in implementing ultra-fast-efficient BCH decoder that frequently used in many applications. A Reformulated inversionless-Berlekamp-Massey algorithm is adopted in order to eliminate the finite-field inverter and to reduce the hardware complexity. Furthermore, we proposed a Direct reformulated-inversionless Berlekamp-Massey algorithm (DriBM). While in the Chien...
Along with the development of technology and the advance of social productivity, the technology of TV and computer have been mostly method of modern information social spread and dealing with information. Video image superposition is one of the multimedia technology application fields; it is the associative production of the TV technology and computer technology. The technology of drawing beeline...
Focusing on the influence of self-heating effect on electrical properties of the SOI device, thermal analysis of the partially depleted (PD) SOI MOSFET with asymmetric source and drain is performed, and temperature distribution and electrostatic potential distribution of the device are simulated with TCAD tools. The results show that: the heat source of the device is the regions with the highest electrostatic...
A simple low power current sensor for DC-DC converters is presented in this paper. The proposed current sensor is designed without using amplifier. This greatly reduces the power consumption and significantly saves silicon area. Simulation shows less than 20uA total current consumption can be achieved by using this structure. The performance of this design is robust to temperature variations. The...
A novel BIST structure is presented which can greatly reduce the test power dissipation without losing fault coverage. Single input change test pattern is generated by a counter and a gray encoder. The built-in test vectors are generated by the single input change patterns which are exclusive-ORed with seeds generated by the modified LFSR. All test vectors will be single input change patterns during...
A low-power CMOS bandgap voltage reference is designed. This bandgap voltage reference adopted advanced startup circuit and sub-threshold technology. The circuit is simulated under SMIC 0.18μm CMOS process and 1.8V supply voltage. The simulation results show that it has significantly low power and low sensitivity to the temperature. The power is only 46.468μW, and the temperature coefficient is 16...
The At-Speed Current testing (IDDA) is adopted to detect faults for analogue circuits in this paper. The scheme of IDDA for analogue circuits is proposed that an input vector pair (V0,V1) repeats k times is applied to circuits under test enable a low-cost ATE or a waveform sensor to measure the average current or the current waveform. And a fault localization method for analogue circuits based on...
This article present the CMOS charge pump circuit which is operated in current mode. MOS transistors in this circuit act as the switches (charge transfer switch) and current source for store the charge from the supply voltage into the fly capacitor and transfer charge from the fly capacitor to the output (output capacitor and resistive load). All of the MOSFET which act as switch operated in saturation...
A new low power low voltage CMOS thyristor delay element is proposed in this paper. The delay range of the proposed circuit is extended by reducing charge sharing problem. The delay element has less voltage and temperature sensitivity and consumes less power. The circuit is implemented in 130 nm technology and simulation result shows that the delay range is from 180 ps to 9 ns which is very high compared...
Analog and mixed signal (AMS) design are important part of system on chip design (SoC), application specific design (ASIC) in short embedded system design which links digital designs to analog world. The IC technologies are scaled to finer feature sizes and circuit applications move to higher frequency bands, analog/RF circuit design faces several new challenges. It is found that AMS design consumes...
This paper presents the new design of a CMOS current comparator for high speed and minimum size. This enables a very low response time to achieve high speed and less circuit complexity. In addition we have got less power consumption. A new current comparator exhibits high speed whilst maintaining low power consumption. Simulation results allow the design approach to be validated with performance comparison...
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