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Software Defined Networking (SDN) is fast gaining acceptance as a networking architecture, which simplifies network management, by separating the control plane from the data plane. Edge-Core SDN is an extended SDN architecture which divides the underlying network into edge and core components. This decouples the edge switch requirements from the network core switch behaviour. When the number of networking...
We live in interesting times. Our systems have unprecedented levels of device integration. Analog and mixed signal components and devices form increasingly large parts of our designs built for low power and high flexibility. New architectures and models of computation that embrace variation like neuromorphic computing are a part of our horizon. Architectures specialized for neural networks and learning...
Video coding has become widespread through mobile devices. At the same time, the adopted resolutions have been enlarged, demanding more coding efficiency and motivating the development of the new state-of-the-art standard, High Efficiency Video Coding (HEVC). However, to achieve the required efficiency the new standard greatly increased the computational intensity. That, allied to real-time constraints...
In this paper, we present CORT, a factored concolic execution based methodology for high-level functional test generation. Our test generation effort is visualized as the systematic unraveling of the control-flow response of the design over multiple explorations. We begin by transforming the Register Transfer Level (RTL) source for the design into a high-performance C++ compiled functional simulator...
In recent years, lightweight cryptography has become essential especially for the resource-constrained devices to ensure data protection and security. The selection of suitable cryptographic algorithm which is directly linked to requirements of the system will have dynamically effect on following such metrics like performance of the device, hardware resource cost, the area, speed, efficiency, computation...
Datacenters provide flexibility and high performance for users and cost efficiency for operators. However, the high computational demands of big data and analytics technologies such as MapReduce, a dominant programming model and framework for big data analytics, mean that even small changes in the efficiency of execution in the data center can have a large effect on user cost and operational cost...
System monitoring is an established tool to measure the utilization and health of HPC systems. Usually system monitoring infrastructures make no connection to job information and do not utilize hardware performance monitoring (HPM) data. To increase the efficient use of HPC systems automatic and continuous performance monitoring of jobs is an essential component. It can help to identify pathological...
The performance model of an application can provide understanding about its runtime behavior on particular hardware. Such information can be analyzed by developers for performance tuning. However, model building and analyzing is frequently ignored during software development until performance problems arise because they require significant expertise and can involve many time-consuming application...
Scaling clusters is no longer the only struggle in moving towards exascale in HPC. While scaling components such as the network and file systems is a widely accepted need, monitoring, on the other hand, is often left behind in the procurement of these large systems. Monitoring is often quite an afterthought that is expected to be incorporated in existing infrastructure. While that often works for...
While the memory footprints of cloud and HPC applications continue to increase, fundamental issues with DRAM scaling are likely to prevent traditional main memory systems, composed of monolithic DRAM, from greatly growing in capacity. Hybrid memory systems can mitigate the scaling limitations of monolithic DRAM by pairing together multiple memory technologies (e.g., different types of DRAM, or DRAM...
A comprehensive energy balancing concept for the Modular Multilevel Converter (MMC) under unbalanced grid conditions was proposed. Grid supporting converters need to be able to fed unbalanced grid currents; grid failures lead to unbalanced grid voltages. Both unbalanced grid conditions generate energy unbalance inside the MMC. In order to handle these critical operating points, an analytical description...
Diversity and subdiversity-oriented systems applied in safety critical industry systems are analyzed through the use of the classification scheme described in standard NUREG7007. This classification is specified considering diversity of hardware and FPGA designs. In particular, diversity of hard logic and soft processors, interfaces and buses, self-diagnostics means, etc… are described. Impact of...
Achieving system fairness is a major design concern in current multicore processors. Unfairness arises due to contention in the shared resources of the system, such as the LLC and main memory. To address this problem, many research works have proposed novel cache partitioning policies aimed at addressing system fairness without harming performance. Unfortunately, existing proposals targeting fairness...
A novel approach of a test environment for embedded networking nodes has been conceptualized and implemented. Its basis is the use of virtual nodes in a PC environment, where each node executes the original embedded code. Different nodes run in parallel, connected via so-called virtual channels. The environment allows to modifying the behavior of the virtual channels as well as the overall topology...
Early design-space evaluation of computer-systems is usually performed using performance models such as detailed simulators, RTL-based models etc. Unfortunately, it is very challenging (often impossible) to run many emerging applications on detailed performance models owing to their complex application software-stacks, significantly long run times, system dependencies and the limited speed/potential...
Recently, wireless technology experiences a fast growth to meet user demand and push toward the boundary limit of system performance. The simulation and verification framework play important role for accelerating investigation of technology proof of concept, field-trial, and large-scale commercial prototyping. In this paper, we present system-level simulation of heterogeneous model and unified HW/SW...
Big data has exacerbated the so-called “memory wall” problem. To study the memory characteristics of big data applications has become an important issue in the high end computing community. In this paper, we propose a trace-based method based on the trace files generated by simulators, which captures memory access information in different memory hierarchies and aggregates information to get memory...
Automated power and energy management systems (APEMS) are unifying control systems that coordinate individual power system components and present appropriate information to system operators. This paper presents ongoing work to establish a methodology and framework for evaluating such systems. As the design space offers many degrees of freedom including functional decomposition, choice of sensors,...
Due to the globalized semiconductor supply chain, integrated circuits suffer from hardware security attacks. Among various attacks, hardware Trojan insertions have emerged as a major security concern. An adversary modifies the original circuit to accomplish the malicious intentions through the hardware Trojan. Hardware obfuscation has been demonstrated as a promising technique to strengthen hardware...
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