The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A new ultra-wideband 0.18-μm CMOS sampling receiver frontend was developed. It includes a low-noise amplifier (LNA) and a sampler and achieves high gain, fast sampling, low noise figure, low power consumption, and enhanced RF-power efficiency. The LNA and sample-and-hold capacitor are switched using two synchronized strobes generated on-chip. Measured results show performance of 9 to 12 dB voltage...
This paper presents three different topologies of low phase noise BAW-based oscillators centered at 2.1 GHz. Two single-ended topologies: a common-base and a colpitts, as well as a colpitts differential topology have been achieved. Measurement shows that the single-ended topology is more sensitive to power supply noise, this results in an advantage for the differential topology that exhibits a phase...
A Ultra-Wideband CMOS Differential Colpitts VCO for 60GHz WPAN fabricated with the 90nm TSMC Process is presented. The VCO is composed of a NMOS transistor-pair as a core circuit, 3 bit capacitor array for enhancement of the oscillation bandwidth, and adaptive gm bias for desensitizing process variations. The proposed architecture can operate at 28~34GHz and the phase noise at 1MHz offset is -112dBc/Hz...
This paper presents a two-stage wideband low noise amplifier (LNA) with active balun. The first stage adopts current bleeding and dc coupled common-drain feedback techniques to achieve high gain low noise figure and acceptable input matching over a wide frequency band. A conventional single-ended to differential convertor is used as a second stage. The proposed wideband LNA is designed for DVB-T application...
In this paper, the aim of this work is to design a V-band low-noise amplifier that is suitable for SoC and wireless communication systems. It achieves a peak gain of 11.7 dB while consuming 21.6 mW.
This paper presents a passive Alter for the front end of a high speed serial link receiver to aid timing recovery. The Alter provides simultaneous lowpass and highpass transfer characteristics to generate the data and its slope respectively. Slope detection is demonstrated at 10-Gb/s. As a proof of concept, the Alter was used to extract a 2-GHz clock from a 2-Gb/s 231- 1 random data sequence based...
A fast-locking low-jitter phase-locked loop (PLL) with a simple phase-frequency detector has been proposed. The phase-frequency detector is composed of only two XOR gates. It can achieve performances of both low jitter and short locking time simultaneously. The voltage-controlled oscillator within the PLL consists of four-stage ring oscillators which are coupled to each other and oscillate with the...
An ultra-wideband CMOS integrated sampling mixer subsystem was designed and fabricated using Jazz Semiconductor's 0.18-mum enhanced RF CMOS process. A two-stage switching strategy is implemented to synchronously merge a low-noise amplifier (LNA) with a sampler to achieve high gain, fast sampling, low noise figure, low power consumption, and enhanced RF power efficiency. The LNA and sample-and-hold...
This work focuses on the practical aspects of high speed baud-rate clock and data recovery (CDR). Baud-rate CDRs reduce the number of clock sampling phases compared to edge-sample phase detector (PD) based CDRs. These CDRs do not require transition samples in addition to the data samples for timing information. Baud-rate CDRs exploit other properties of the incoming data for timing information. Typical...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.