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Given the complexity of modern integrated circuits, design reuse is essential, but current hardware description languages do not adequately address reuse challenges for many classes of design. Processor cores, as an example, are shaped by cycle-level interactions, and leveraging such designs into environments with different timing constraints requires retiming, repipelining, and microarchitectural...
To improve the effective utilisation of its supercomputing platforms, the New Zealand eScience Infrastructure (NeSI) offers, in addition to user support and the installation of a comprehensive software stack, a consultancy service to some of its users. Here we present lessons learned from this work and how additional improvements can be made to further enhance productivity of researchers on computing...
Aiming at the problem of the effect of information technology and its impact on the performance of the manufacturing industry. Based on the existing research, we sets information hardware and software investment as explanatory variables, the number of highly educated employees as the moderator variables, the enterprise performance as the explanatory variables. This paper makes an empirical study of...
Due to advances in medicine, the societies have become aging, which leads to the problem of missing teeth. Missing teeth negatively affects not only external appearance but also personal dietary habits. Therefore, it has become an important issue in dentistry to solve the problem of missing teeth. In Taiwan, dental prostheses for missing teeth are produced by dental technicians in dental laboratories...
How to effectively utilize the computing resource remains a longstanding challenge in MapReduce application, and MapReduce system productivity has become a major issue in research field. In the paper, we explored the productivity mathematical models for MapReduce system, defining the productivity as the ratio of the workload and energy consumption per unit time, and proposed the measurement approach...
MapReduce applications, which require access to a large number of computing nodes, are commonly deployed in heterogeneous environments. The performance discrepancy between individual nodes in a heterogeneous cluster present significant challenges to attain good performance in MapReduce jobs. MapReduce implementations designed and optimized for homogeneous environments perform poorly on heterogeneous...
In this work we describe the scenario of fully-immersive desktop VR, which serves the overall goal to seamlessly integrate with existing workflows and workplaces of data analysts and researchers, such that they can benefit from the gain in productivity when immersed in their data-spaces. Furthermore, we provide a literature review showing the status quo of techniques and methods available for realizing...
The paper is dedicated to specification, synthesis, and implementation of digital systems. The emphasis is done on application of reconfigurable technology, which is widely employed today. At the beginning, traditional methods of digital design are briefly reviewed and it is shown how these methods can be adapted to new computer-aided tools. The importance of hardware and system-level description...
Autonomous mobile robots require high-performance computation to meet variety of requirements of functions, such as sensing, intelligent image processing and controlling actuators. We focus on FPGA as a hardware platform for autonomous mobile robot system. However, a FPGA-based system is not effective in development cost, since it requires HDL-based design whose productivity is relatively low. In...
Several leading research groups name hardware generation as the next disruptive productivity improvement after IP-reuse. Metamodeling and code generation have already demonstrated a speedup by a factor 3× for the complete implementation phase of a chip. Furthermore, code size reduction by a factor of 3× was achieved with the hardware generation language (HGL) Chisel.
SMEs are the growth engine of a developing country's economy. It is actively contributing to GDP and employment. In consequence, SMEs financing support, ICT adoption promotion and SME's favorable evolution environment creation by policy makers, help reduce the digital divide in this era of the knowledge economy. High penetration and lower costs of Internet connectivity, Web technologies standardization,...
High-performance FPGA programming has typically been the exclusive domain of a small band of specialized hardware developers. They are capable of reasoning about implementation concerns at the register-transfer level (RTL) which is analogous to assembly-level programming in software. Sometimes these developers are required to push further down to manage even lower levels of abstraction closer to physical...
The complexity of hardware systems is currently growing faster than the productivity of system designers and programmers. This phenomenon is called Design Productivity Gap and results in inflating design costs. In this paper, the notion of Design Productivity is precisely defined, as well as a metric to assess the Design Productivity of a High-Level Synthesis (HLS) method versus a manual hardware...
Implementation times for moderate to large designs targeting FPGAs can be formidable. When FPGA compile times exceed that of a typical software compile time, virtual prototyping environments become increasingly attractive. Virtual prototyping environments, however, are limited in their ability to capture and operate on live data, sometimes exhibit behavior mismatches between the modeled, and implemented...
Designer productivity is a growing concern as over-all hardware complexity rises. Design reuse, a key component in productivity, is underutilized. Not only can existing designs be reused, but also the patterns and information contained within them as well. With the increase in the number of circuits available, there requires a need to analyze and retrieve designs with ease in order to accelerate design...
Advances in integrated circuit technology are enabling construction of increasingly more powerful architectures for Software Defined Radio (SDR) platforms. For instance multicores, multiprocessor System-on-Chip and FPGAs provide opportunities for innovative prototyping and increased programmability whereby more radio processing is done in the digital domain. But there are challenges with these technologies,...
With decades of investments, productivity has still continued to be a major issue for many digital circuit designers. One of the most important factors in improving productivity is design reuse, which current tools have yet to fully exploit. Reusing designs involve manually searching through repositories to find a design that meets the requirements of a project. This search can be tedious and often...
Application development with hardware description languages (HDLs) such as VHDL or Verilog involves numerous productivity challenges, limiting the potential impact of reconfigurable computing (RC) with FPGAs in high-performance computing. Major challenges with HDL design include steep learning curves, large and complex codes, long compilation times, and lack of development standards across platforms...
The Partitioned Global Address Space(PGAS) programming model strikes a balance between high performance and locality awareness. As a PGAS language, Chapel relieves programmers from handling details of data movement in a distributed memory environment, by presenting a flat memory space that is logically partitioned among executing entities. Traversing such a space requires address mapping to the system...
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