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Most existing concepts for hardware implementation of reversible computing invoke an adiabatic computing paradigm, in which individual degrees of freedom (e.g., node voltages) are synchronously transformed under the influence of externally- supplied driving signals. But distributing these "power/clock" signals to all gates within a design while efficiently recovering their energy is difficult...
The Compact Fluorescent Lamps (CFLs) are widely adopted in residential and commercial sector. This adoption is proposed following the energy conservation and environmental protection efforts. Despite, the CFLs consume low power, many users using these loads can cause a harmonic impact depending of the Attenuation-Amplification Effect. For instance, if this Effect is neglected (e.g., using Harmonic...
We present a set of tools for digital design, integration and verification of mixed-signal Application Specific Integrated Circuits (ASIC) developed within our design team. We have chosen Python for the development of the tools. By drawing on Python's features we have developed tools targeting many steps required across a design flow: a) Complex digital blocks are auto-generated, where Python generates,...
A highly versatile broadband equivalent circuit model for arbitrary lossy wire networks including moderate radiation losses is presented. Based on a quasistatic Method-of-Moments-eigenvalue problem a modal multiport circuit is derived with minimal computational effort, offering fast convergence and inherent stability for time-domain simulations with arbitrary active/passive non-linear loads. The model...
In this paper, we model the inductive current clamp (ICC) method described in the ISO 7637-3 standard, where we apply a broadband transient signal as disturbance. To validate the advocated model, a nonlinear device under test (DUT) is simulated, manufactured and measured under the ISO 7637-3 standard test conditions. Furthermore, it is shown that the proposed model can be used to study the DUT's immunity.
Power consumption reduction is a very critical challenge in nowadays nanoscale circuits. In this paper, a new power reduction approach is demonstrated. This approach is originally based on the idea of TSV multiplexing in 3D-ICs where two or more signals can flow through one TSV instead of multiple TSVs. Based on that behavior, the possibility of power reduction of this circuit is discovered and its...
A three-dimensional finite element model of miniature circuit breaker is established. The steady state temperature field is obtained by the method of electrothermal coupling, and the mechanism of overload protection is analyzed. The influence of wire size on the temperature of bimetal is studied. A simple and effective method to reduce the influence of external wire size is presented. The influence...
We have developed a model of the nonlinear polariton dynamics in realistic strongly-coupled 3D non-planar microcavity wires based on driven-disspative mean-field Gross-Pitaevskii equations. We find that the typical microcavity nonlinear optical bistability response evolves into multistability upon variation of realistic model parameters and discuss its origin in terms of multiple co-existing transverse...
This paper describes a methodology to build a combined conducted and radiated emission model for integrated circuits. The development of emission models of a FPGA extracted from two different approaches is presented and discussed. The first approach allows to build a predictable model from FPGA implementation and some passive measurement on FPGA device. The second approach allows to build a model...
In this paper, we develop a circuit model for the ISO 10605 field coupled ESD test setup. Here, the model is applied to a wire harness consisting of three wires and the device-under-test is a pressure sensor chip designed for use in the automotive industry, allowing to illustrate and validate the proposed circuit model for the ISO 10605 field coupled ESD test on a real application.
In a seminal 1990 paper [9], Martin presents the C-element Theorem which implies, roughly, that the class of purely delay insensitive (DI) circuits is fundamentally limited in the set of functions it can implement. We provide circuit examples, both DI and not DI, that violate assumptions or results from [9], showing that the set of circuits considered by [9] is more limited than one might expect—and...
Ice storms may lead to the icing of the power and ground wires of the transmission lines. To prevent wires' breakage, the ice melting procedure is required. The most common method of the de-icing procedure requires usage of the power rectifier with high voltage thyristors. They are sensitive to external influences such as power line induced voltage. The aim of our work is to develop the calculation...
Microfabrication technology can enable extracellular neural recording electrodes with unprecedented wiring density, and the ability to benefit from continued CMOS technology scaling. A neural recording electrode consists of recording sites that sense electrical activity inside the brain, and wiring that routes these signals to neural amplifiers outside the brain. We here introduce a scalable circuit...
In this paper, a study of ground and power bounce effect in small digital CMOS circuits is proposed. First, a simplified model of digital CMOS circuit and its operation are analyzed. Then, an analytical method for computing the ground and power bounce, based on differential equations, is detailed. Finally, the effect of ground and power bounce is studied through simulations in two different simulators...
A method is proposed to predict the shape of a paper model of a three piece brassiere cup, which consists of several cloth and wire parts. Currently, the shape of each part is determined by creating a paper model and then refining the model. This process is repeated until the desired shape is achieved. However, predicting the 3D shape with a simulation would improve design efficiency. As a model is...
Parasitic resistances cause devices in a resistive memory array to experience different read/write voltages depending on the device location, resulting in uneven writes and larger leakage currents. We present a new method to compensate for this by adding extra series resistance to the drivers to equalize the parasitic resistance seen by all the devices. This allows for uniform writes, enabling multi-level...
With the purpose of analyzing the crosstalk of multi-conductor transmission lines, an analytical approach — the lumped parameter model method is presented. First, the physical model of multiple adjacent transmission lines is established by using the 2D field solver of the Ansoft Q3D software and the unit length electrical parameters such as capacitance matrix and inductance matrix of transmission...
In twisted wire crosstalk research, common-mode traditional alternative inverted model ignores cross section distance. A new differential-mode twist wire pair crosstalk model considering cross distance is established and the frequency domain of the model is analyzed in this paper with the method of establishing circuit model, mathematical model and solving the parameter matrix chain. The results show...
The stuck-at faults are basic faults that fail the chips. Various defects in the circuit can develop into stuck-at faults. To detect more defects caused by stuck-at faults, some of the fault sites may need to be detected multiple times. Thus, the existing pattern generation techniques provide N-detect ATPG, where each fault site would not be removed from the fault list before it is detected for N...
The UHF antenna for the Skynet communications satellite comprises a circularly polarized helix radiator. In the CAL design (Fig, 1), the helix conductor is realized as an aluminum tape conductor supported at one end by an extendible structure designated as the bistem. This central conducting tube, along with a set of longitudinal support tapes, allows the helix to be deployed in orbit. At the base...
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