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We present an energy efficient QRS detector for real-time ECG signal processing implemented in ASIC. An adaptive thresholding scheme based on forward search interval (FSI) algorithm together with simple preprocessing is proposed to accurately detect QRS peaks. The Verilog HDL codes with improved hardware utilization efficiency are validated using FPGA, achieving 99.59% sensitivity (Se) and 99.63%...
For several use cases of complex processing algorithms on ultrasound NDT data, it is mandatory to ensure real-time signal processing speed. This can be achieved by using e.g. a field programmable gate array (FPGA). Sparse signal recovery (SSR) and compressed sensing (CS) methods are used for superior reconstruction of flaws from compressed measurement data. SSR and CS are currently a hot research...
Ultrasonic NDE uses high frequency acoustic waves to evaluate materials, and often signal processing is required to detect echoes from defects in the presence of microstructure scattering noise. Scattering noise, also known as clutter, interferes with the flaw signal and cannot be completely eliminated by using classical signal processing methods such as band-pass filtering. In this paper, neural...
Pedestrian detection is a very important application of embedded real-time vision systems. It is essential in Advanced Driver Assistance Systems (ADAS) and Advanced Video Surveillance Systems (AVSS). The most widely used method involves a combination of Histogram of Oriented Gradients (HOG) features and Support Vector Machine (SVM) classifier. It offers quite high detection accuracy at the cost of...
This paper presents the authors' research work in the fields of embedded real-time softcore systems on FPGAs and specialized optimizing assembly language compiler. With this softcore processor, we are targeting a highly specialized field of applications that require a large floating point precision and other unique characteristics. Therefore, a specialized optimizing assembly language compiler is...
In this paper, a custom software defined radio that implements a smart antenna array is used in the task of real-time beamforming. Specific beamforming algorithms are implemented in FPGA, remotely controlled by a computer host. The antenna array is mounted in a metallic cylinder and tested in anechoic chamber. Experimental measurements highlight the efficiency of the algorithms implementation. Moreover,...
Quadrature downconversion impairments should be taken into account and compensated to the increasing of the Direct Conversion Receiver (DCR) reception quality. DC-offset and I/Q-imbalance are fitted into this group. Experimental estimation of two relatively simple compensation methods for the indicated drawbacks is reviewed in the paper. Energy efficiency and computational complexity estimation are...
The paper is devoted to the implementation on the FPGA of the algorithm for the optimal combining of signals. Described the algorithm, the architecture of the optimal combining block, implemented to a four-element antenna system. The signal-to-noise ratio chosen as a criterion reflecting the efficiency of interference suppression in the reception band (increase of noise immunity). The effectiveness...
In this paper are presented the implementation of some blocks of software radar receiver on the PXI platform. Realization of the processing of radar signals in real time is achieved. Comparative analysis of the results of detection of real radar targets between the offline and processing in real time on the appropriate hardware components is shown.
The inverse square root is a common operation in digital signal processing architectures, in particular when matrix inversions are required. The Newton-Raphson algorithm is usually used, either in floating or in fixed-point formats. With the former format, the well-known fast inverse square root computation is based on a 32-bit integer constant, which is allowed by the standardized format of the mantissa...
Ultrasonic Non-Destructive Testing (NDT) and imaging systems has been widely used for industrial and medical applications. In NDT system, detection and characterization of target signal can be extremely challenging because of the complex echo scattering environment and the system noise. In this paper, an algorithm based on Neural Network (NN) is presented to explore the possible solutions for ultrasonic...
This paper proposes a relatively simple program for measuring currents and voltages in electrical power system. Real-Time processing is achieved by using CompactRIG programmable automation controller which combines embedded Real-Time and FPGA modules. The device also enables users to quickly develop program code via LabVIEW graphical programming language. The process of data exchange between FPGA...
The paper presents an implementation of the Goertzel algorithm in FPGA (Field Programmable Gate Array) logic as a proposed algorithm utilized in Eddy current NDT (Non-Destructive Testing) instrumentation equipment. The FPGA running a real-time Goertzel algorithm in Eddy current NDT application is a novel approach different from the usual methods; such are the quadrature demodulation and discrete FFT...
Field Programmable Gate Arrays (FPGAs) are usually perceived as difficult to exploit due to the High Level of expertise required to program them. In the last years, the major FPGAs vendors have produced different High Level Synthesis (HLS) tools to help programmers during the flow of acceleration of their algorithms through the hardware architecture. However, these tools often use languages considered...
This paper presents a Field Programmable Gate Array (FPGA) implementation of Particle Swarm Optimisation (PSO) algorithm for maximum power point tracking (MPPT). The PSO method is very effective to handle the multimodal power-voltage (P-V) curve under partial shading conditions and presents several advantages such as simple structure and good dynamic performances. The PSO method has been designed...
Application specific integrated circuits (ASICs) are commonly used to implement high-performance signal-processing systems for high-volume applications, but their high development costs and inflexible nature make ASICs inappropriate for algorithm development and low-volume DoD applications. In addition, the intellectual property (IP) embedded in the ASIC is at risk when fabricated in an untrusted...
In Cooley-Tukey algorithm the Radix-2 decimation-in-time Fast Fourier Transform is the easiest form. The Fast Fourier Transform is the mostly used in digital signal processing algorithms. Discrete Fourier Transform (DFT) is computing by the FFT. DFT is used to convert a time domain signal into its frequency spectrum domain. FFT algorithm use many applications for example, OFDM, Noise reduction, Digital...
In recent years the Fast Fourier Transform is widely used in a number of applications as it is considered to be an efficient algorithm to compute the Discrete Fourier Transform. The process of computing the FFT for large sequence real time data becomes complex and tedious. Hence it is necessary to design a system that can perform the FFT computation of large sequence data with reduced power consumption...
Multichannel active noise control (MCANC) systems are commonly used in acoustic noise or vibration control, such as large-dimension ventilation ducts, open windows and mechanical structures. However, its computational load far exceeds the capabilities of digital signal processors (DSPs) and microcontrollers. Even the field programmable gate array (FPGA) cannot straightforwardly cope with the exponential...
The paper presents the results of design explorations for the implementation of the Smith-Waterman (S-W) algorithm executing DNA and protein sequences alignment. Both design explorations studies and the corresponding FPGA implementations are obtained by writing a dynamic dataflow program implementing the algorithm and by direct high-level synthesis (HLS) to FPGA HDL. The main feature of the obtained...
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