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A simple prediction method for the bipolar pulse cancellation effect is proposed, based on analysis of single-cell transmembrane potential frequency spectra for a variety of unipolar and bipolar input signals in the nanosecond and microsecond time scales. Our evaluations are in good agreement with experimental results for electropermeabilization-induced Ca2+ influx using 300 ns, 750 kV/m pulses.
Microsecond pulsed electric fields (μsPEFs) with amplitude of tens of kV/m are used to permeabilize the plasma membrane whereas nanosecond pulsed electric fields of MV/m also permeabilize cell internal structures, such as the endoplasmic reticulum. In this work, a numerical realistic model of cell and its reticulum has been realized to study the use of μsPEFs also for the permeabilization of this...
Nano-systems, often used in biomedical applications for the treatment of a broad category of illnesses, represent one of the nanomedicine approaches recently proposed to target specific drugs only in the region where the disease has been developed. Recently the use of this technique has been proposed with electropulsation, hence taking advantage of the enhanced permeabilization of the cell membrane...
This paper discusses a simulation platform for predicting the behavior of a battery system comprising two batteries, which can be parallelized in a controllable way. The model of the battery, the load and the parallelization algorithm is developed and simulated in MATLAB® Simulink environment. The simulation platform and the proposed parallelization algorithm are validated in a real gardening application...
The application of intense, short-duration pulsed electric fields to biological membranes induces an increase of their conductivity to external molecules, an effect termed electroporation (EP), which is currently exploited in several biomedical, industrial and environmental applications. The study of interaction mechanisms between pulsed electric fields and biological structures is addressed by experiments...
In modern CMOS technology, local electrical stress has substantially increased as device geometries scaled down more aggressively compared to supply voltages. As a result, time-dependent degradation mechanisms (aging phenomena) became an important performance problem, which leads to a considerable lifetime reduction in manufactured integrated circuits. Combination of these aging phenomena with process...
The standard multivariate metrics for semiconductor product yield estimation and prediction in production processes usually assume that the parameters contributing to the yield are all normally distributed. However, the data met in production processes is not always multivariate normal. A variety of methods has been developed for multivariate non-normal data, but these usually rely on no statistical...
This work comprises an extended and comprehensive evaluation of idealized class-E operation with finite DC-feed inductance. It exhibits an analysis of varying switching duty cycle as well as varying switch voltage slope at switch-on time. As a result of this special cases for idealized class-E operation able to maintain efficient zero-volt switching while the load resistance changes is revealed which...
In this work, a combination of 2D and 3D quasi-static Green's functions (GF) is proposed for extending the frequency range validity of the quasi-static approximation. It is shown that 3D-GF is very accurate at low frequency, whereas 2D-GF is more suitable at higher frequencies because it is the actual solution of the transverse electromagnetic (TEM) propagation mode. The mixing of both GFs is controlled...
The power elements are the weak parts of integrated circuits (ICs), in fact, through these elements the power is usually dissipated as heat. This provides two effects: non-uniform generation of the heat across the die and temperature gradients. Understanding this phenomena is very important for choosing the right location of sensitive components, like thermal sensors, in order to improve reliability...
Laser fault injection attacks induce transient faults by locally generating transient currents capable of temporarily flip the outputs of several gates. Many models used to simulate transient faults induced by laser consider several elements to better represent the effects of the laser on ICs. However, a laser-induced current between VDD and GND, which provokes significant IR drops, has been neglected...
In this study, we perform a physical-information-theoretic analysis to obtain fundamental energy dissipation bounds for fault-tolerant reversible CMOS circuits we synthesize using Hamming codes. We show that the approach we had initially developed to calculate theoretical efficiency limitations of emerging electronic paradigms can also be applied to CMOS technology base and can provide feedback to...
This paper introduces a novel placement methodology for a common-centroid (CC) pattern generator. It can be applied to various integrated circuit (IC) elements, such as transistors, capacitors, diodes, and resistors. The proposed method consists of a constructive algorithm which generates an initial, close to the optimum, solution, and an iterative algorithm which is used subsequently, if the output...
In this paper, we present a radio frequency (RF) front-end design for increasing robustness of non-coherent energy detection based impulse radio (IR) ultra-wideband (UWB) receivers in impulsive noise environment. Robustness against impulsive noise is achieved by on chip LNA-bandpass filter (BPF) circuit, which also works as a clipper for high energy impulsive noise bursts. The electrostatic discharge...
Internet-based computing is booming. This has brought positive effects on education and engineering design practice. This paper introduces the development details on a web-based symbolic circuit simulation tool AICE (Analog IC Explorer). Unlike SPICE simulators, symbolic tools are small and compact. Making a symbolic tool available online as a web service has many benefits: 1) cross-platform, 2) wide...
In this work, a CMOS transistor array is presented, which allows performing process variability, Random Telegraph Noise and BTI/CHC aging characterization in a single chip. The array, called ENDURANCE, integrates 3136 MOS transistors, for single and massive electrical testing. This chip, together with a dedicated measurement set-up, allows programming any of these electrical tests, considerably reducing...
The design and analysis of a low power comparator that features an offset cancellation technique has been carried out in this paper. The proposed low power circuit works on a 1 GHz sampling frequency and is developed in 65nm CMOS technology. An offset cancellation technique and a switch are added to the comparator to reduce the offset and kickback noise. The comparator is implemented in a 5-bit Flash...
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