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This article consists of a collection of slides from the author's conference presentation on the Maven vector-thread architecture. Maven is more energy efficient than MIMD architectures on regular DLP and on irregular DLP The Maven vector-thread architecture is a promising alternative to traditional vector-SIMD architectures, providing greater efficiency and easier programmability Using real RTL implementations...
This article consists of a collection of slides from the author's conference presentation on a comparative analysis of ZCache versus Vantage, single chip multi-core processors.
This article consists of a collection of slides from the author's conference presentation on the deployment of many core chips for supercomputing applications. In the many core era, power has become the limiting factor in performance scaling. This poster demonstrates the ability of active messages to increase the energy efficiency of parallel code.
This article consists of a collection of slides from the author's conference presentation on fetch mechanisms in program processors. Some of the specific topics discussed include: the special features of fetch mechanisms; the use of instruction registers; processing capabilities; design considerations; power consumption; and experiment and testing results.
This article consists of a collection of slides from the author's conference presentation on VENICE (Vector Extensions to NIOS Implemented Compactly and Elegantly), a SVP (soft vector processor) intended to accelerate computationally intensive applications implemented on an FPGA. SVPs are exclusively for FPGAs, targeted at the productivity gap between writing custom hardware in an HDL and writing...
This article consists of a collection of slides from the author's conference presentation on the special features, system design, processing capabilities, and targeted markets for Intel's Digital Randon Number Generator (DRNG)family of products.
This article consists of a collection of slides from the author's conference presentation on the special features, system design, processing capabilities, and targeted markets for SeaMicro's SM10000-64 server family of products. .
This article consists of a collection of slides from the author's conference presentation on Cisco's Sereno, its second generation virtualized network interface controller. Some of the specific topics discussed include: the special features, system specifications, and system design for these products; system architectures; applications for use; platforms supported; processing capabilities; memory...
This article consists of a collection of slides from the author's conference presentation on the special features, system design, processing capabilities, and targeted markets for Microsoft's Kinect Sensor family of products. .
This article consists of a collection of slides from the author's conference presentation on low power high-density, 10GBASE-T Ethernet transceivers. Some of the specific topics discussed include: the historical development of Ethernet; markets for Ethernet technology; processing and communications switching capabilities; 10GBase T technical requirements and processing capabilities; design challenges;...
This article consists of a collection of slides from the author's conference presentation on the special features, system design abd architecture; processing capabilities, and targeted markets for Facebook's server board family of products.
This article consists of a collection of slides from the author's conference presentation on the special features, system design, processing capabilities, and targeted markets for IBM's Blue Gene/Q Computer chip.
This article consists of a collection of slides from the author's conference presentation on the special features, system design, processing capabilities, and targeted markets for Orcale's T4, a highly threaded server-on-chip processor.
This article consists of a collection of slides from the author's conference presentation on the special features, system design, processing capabilities, and targeted markets for Tilera's TILE-Gz100 ManyCore processor family of products.
This article consists of a collection of slides from the author's conference presentation on Cavium's NITROX, a 40 Gbos next generation virtualized security processor. Some of the specific topics discussed include: the special features, system specifications, and system design for these products; system architectures; the major components of NITROX; applications for use; platforms supported; processing...
This article consists of a collection of slides from the author's conference presentation on Intel's Itanium processor family of products. Some of the specific topics discussed include: the special features, system specifications, and system design for these products; system architectures; applications for use; platforms supported; processing capabilities; memory capabilities; and targeted markets.
This article consists of a collection of slides from the author's conference presentation on the special features, system design, processing capabilities, and targeted markets for Intel's Quick Sync Video, a product that deploys video transcoding on processor graphics.
This article consists of a collection of slides from the author's conference presentation on Facebook storage tiers. Some of the specific topics discussed include: Facebook storage capabilities; storage tiers; the key features of the Type III database features; the key features of Project Knox; Open Compute System components; Know architectural advantages; and the Know chassis and circuit layout.
This article consists of a collection of slides from the author's conference presentation on the special features, system design and architecture, processing capabilities, and targeted markets for MoSys's Bandwidth engine.
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