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Most of the advanced CCD sensors require bipolar clocks with large voltage swings. Hence there is a need of voltage level shifter to translate TTL/CMOS compatible levels to bipolar voltage swings (up to 20V). The CMOS drivers have advantages of low power and high input impedance but its main challenge is to attain negative voltage swing. Hence different topologies have been studied to implement the...
This paper presents a Verilog-A implementation of three different energy efficient architectures of Successive Approximation Register (SAR) analog-to-digital converter (ADC) namely SAR ADC with monotonic capacitor switching DAC, SAR ADC with split-monotonic capacitor switching DAC and SAR ADC with bypass window technique. These architectures were constructed for a resolution of 4 bits. Simulation...
Traditional Mesh based Networks-on-Chips, are inherently slow due to hop-by-hop packet forwarding. The addition of Express Channels has emerged as a viable solution to reduce packet latency. However, there is a lack of application mapping methods, which can take into account the nature of the Express Channels. In this paper a constructive heuristic based approach has been proposed for application...
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