The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
The semiconductor industry has largely gotten off the Moore's law treadmill. Many companies have stopped scaling, realizing that the 65, 45 or 32nm are sufficient for their needs, and relying on foundries to shoulder the risk and capital requirements for advanced nodes. This has resulted in a reduced need for VLSI-oriented research as the industry consolidates and traditional funding sources ramp...
Devices manufactured in 20 nm and smaller geometry technologies will potentially be very large by today's standards, they will also have new characteristics implied by things like process variability and adoption of FinFET transistors. The industry has cumulatively adopted more and more sophisticated fault models that use timing as well as layout information. There is a growing body of experimental...
A 0.7 V 400 nW fourth-order active-passive ΔΣ modulator with one active stage is presented in this paper using standard CMOS 65 nm technology. The modulator achieves 84 dB SNR and 80.3 dB SNDR in a signal bandwidth of 500 Hz with a sampling frequency of 256 kHz. The input-feedforward architecture is used to improve the voltage swing before the comparator of the traditional passive modulators, which...
Spike Timing Dependent Plasticity (STDP) is a time-based synaptic plasticity rule that has generated significant interest in the area of neuromorphic engineering and Very Large Scale Integration (VLSI) circuit design. During the last decade, STDP and STDP-like learning mechanisms have shown promising solutions for various real world applications, ranging from pattern recognition to robotics. This...
This work presents an improved design of the current amplifier based optimal complex filter providing fully electronically programmable characteristics. It extends the tuning features to include the pole frequency and the gain in addition to the center frequency. The new solution avoids the employment of capacitor and/or resistor banks leading to a more compact design solution while maintaining comparable...
This paper presents the design of single-stage amplifiers with enhanced DC gain without the need of using any cascode devices or any positive-feedback or feed-forward techniques. Instead, two voltage-combiners are used in replacement of the traditional tail current-source that is normally employed to bias the differential-pair. Simulation results of a properly optimized circuit example, using AIDA-C...
The goal of this paper is to provide design considerations for the use of low gain amplifier presents in the Multiplying Analog-to-Digital Converter (MDAC) of pipelined ADCs with gain error correction in the digital domain. Using low gain amplifier in the MDAC makes the pipelined ADC more susceptible to gain variation and harmonic distortion, impacting the ADC performance. Theory and simulations are...
Several image processing applications rely on a sparse set of correspondence points between stereo images to discern a sparse but robust depth structure of the scene. There exist several methods to extract and match correspondences, but they are all computationally extensive and require significant memory bandwidths. In this paper, we describe an efficient ASIC core that is able to detect up to 25...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.