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Dynamic signal processing systems, where significant changes in functionality and computational structure must be achieved while applications are running, are becoming increasingly important as computational platforms become more powerful, and feature-sets of DSP-powered products become more sophisticated. This talk covers two new, complementary dataflow models of computation that are being developed...
Supercomputers are the most powerful and fast computing instruments in the world. Expensive, huge, and power hungry, they compete twice a year for their ranking in the Top500 list. Supercomputers also represent the leading edge in computer technology. It can be argued that the computing technology developed for supercomputers is found in desktop environments 10 years later, and in embedded systems...
We consider software transactional memory (STM) concurrency control in multicore embedded real-time software. We design an Earliest-Deadline-First (EDF) contention manager (CM) to augment STM's obstruction-free progress semantics. We establish the conditions under which STM/EDF-CM is competitive to lock-based and lock-free synchronization. Our experimental results reveal that STM/EDF-CM outperforms...
Future manycore Systems-on-Chip will integrate tens or even hundreds of cores. Tiled architectures have come to the focus of research and industry. Such platforms integrate processing cores in clusters and connect those ‘tiles’ with a global interconnect. Message passing programming models are favored to program such complex distributed memory systems. A significant performance overhead is involved...
This paper analyzes the impact of dynamic task scheduling, processing element allocation and data transfer management on system performance of heterogeneous MPSoCs. Therefore, all parts of a runtime scheduling unit are analyzed. Bottlenecks are identified and their complexity evaluated. Furthermore, traced information is processed with two newly introduced tools. The first one generates an annotated...
Graphics Processing Units (GPUs) are becoming increasingly important in high performance computing. To maintain high quality solutions, programmers have to efficiently parallelize and map their algorithms. This task is far from trivial, leading to the necessity to automate this process. In this paper, we present a technique to automatically parallelize and map sequential code on a GPU, without the...
Energy harvesting systems provide a promising alternative to battery-powered systems and create an opportunity for architecture and design method innovation for the exploitation of ambient energy source. In this paper, we propose a two-stage optimization approach to develop power adaptive computing systems which can efficiently use energy harvested from solar source. At design time, an SPMD (single...
The demand for low-power embedded systems requires designers to tune processor parameters to avoid excessive energy wastage. Tuning on a per-application or per-application-phase basis allows a greater saving in energy consumption without a noticeable degradation in performance. On-chip caches often consume a significant fraction of the total energy budget and are therefore prime candidates for adaptation...
Energy consumption is a major issue in data centers operating 24 hours a day, 7 days a week. The power dissipated by a web cluster is not proportional to the numbers of incoming requests if only DVFS (Dynamic Voltage Frequency Scaling) is used. This is because of the nonlinear power efficiency of DVFS, the large load fluctuation in web services and the typical CPU utilization rates of a server. This...
Increased power densities result to higher on-chip temperatures, which in turn creates numerous problems tightly firmed to reliability issues. This problem is expected to become even more severe for deep-submicron technologies. In this paper, we propose a thermal-aware exploration framework at the microarchitecture level for temperature hotspots elimination through selective resource replication....
VMODEX is an interactive visualization tool to support system-level Design Space Exploration (DSE) of MPSoC architectures. It was initially developed to help designers to get insight into the search process of Multi-Objective Evolutionary Algorithms (MOEAs) that are typically used in the DSE process, and facilitates the analysis of the DSE results. In this paper, we extend VMODEX to help algorithm...
Reconfigurable chip multiprocessors realizing very long instruction word (VLIW) processors of dynamically-scalable issue width enable resource-aware adaptation to diverse processing requirements. The execution performance of such clustered VLIW processors is significantly influenced by different design parameters of the fundamental processing cores. In this paper we present a design space exploration...
Contemporary embedded systems are often designed as Multiprocessor System-on-Chips (MPSoC) which include multiple processors and other peripherals on a single chip. In contrast to general purpose multiprocessors, the design of an embedded MPSoC is usually customized to the requirements of the application domain. The need for fast time to market of new embedded MPSoC designs calls for a rapid design...
Current tools for embedded system design have limited support for modelling the interaction of the system with its physical environment. Furthermore, the natural representation of (streaming, real-time) applications with dataflow models is not supported by most tools. However, integrating multiple domains supports the design of complex interdisciplinary systems and enables model transformations. In...
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