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For transistor research and development, one of the important figures of merit is the carrier mobility. The measurement of mobility is cumbersome in large devices, and nearly impossible in nano scale devices. Very often, effective mobility (μeff) is extracted from the I-V curve instead. There are many pitfalls in equating μeff to mobility (μ), including charge-trapping and series resistance effects...
An overview of metallic source/drain (MSD) contacts in nanoscaled MOSFET technology is provided in this paper. MSD contacts offer several benefits for nanoscaled CMOS, i.e., extremely low S/D parasitic resistance, abruptly sharp junctions between S/D and channel and preferably low temperature processing. In order to achieve high performance MSD MOSFETs, many design parameters such as Schottky barrier...
This paper focused on special requirement of low on-resistance of VDMOS in BCD process. VDMOS structure and its process were studied, and a method for decreasing on-resistance of VDMOS was developed. In this method, a 10 μm deep trapezia ring was formed on the N+ ring of D electrode of VDMOS, and a few more steps were added to ordinary BCD process. Using the method, N-type VDMOS transistor with low...
Analog-to-digital conversion plays an essential role in all kinds of electronics systems, including signal processing, communications and storage. In particular, interpolated flash ADC has been widely used in high-speed systems requiring very high sampling speed. Obviously, practical ADC design is very challenging, which has been dominated by experiences and trial-and-error skills. This is true to...
This paper describes a novel bandgap reference with high PSRR over a wide frequency range. The design utilizes an internally regulated supply voltage without high gain feedback loop. Thus improve PSRR even at high frequency. Additional transistors are added to further improve supply rejection and minimize the second order effect. The circuit is implemented in 0.25 μm CMOS technology. It generates...
In this paper, a 4-channel photocurrent detector is described which is used in the field of photoelectric detection. Each channel of the detector consists of TIAs and voltage comparator, and current detection threshold can be set by external voltage. The TIA has measured 1.5mA input current overload capacity and 1.9 nArms equivalent input noise current level. The detector is processed in 2 um all-NPN...
A high output power and high efficiency power amplifier (PA) is designed for 60 GHz wireless point-to-point communication using IBM 90 nm CMOS process. A high efficiency is achieved through the utilization of cascode structure with floating n-well and differential inductor to resonate out the parasitic capacitances. To further boost the output power, four PA units are combined together through power...
P-MOSFETs with HfO2 gate dielectric and TiN metal gate were fabricated on compressively strained SiGe layers with a Ge content of 50 at.% and electrically characterized. The devices showed good output and transfer characteristics. The hole mobility, extracted by a split C-V technique, presents a value of ~200 cm2/V·s in the strong inversion regime.
Stack-transistor structure is often used in RF applications for higher power handling capability and/or isolation. LDMOSFET may provide similar advantages with smaller device area and lower series resistance. The purpose of this work is extracting the RF parameters of a LDMOSFET and design a RF switching circuit with these parameters. The design trade-off between LDMOS and CMOS technologies was discussed...
A new type of polycrystalline silicon (poly-Si) thin-film transistors (TFTs) with self-aligned metal electrodes (SAME) is systematically characterized. New device features different from conventional poly-Si TFTs are found, and are attributed to the presence of Schottky barriers at the channel ends.
In this work, the properties of sputtered Mo/TaN bilayers and Mo-Ta single layer as diffusion barriers were investigated for Cu metallization. The experimental results show that the Mo(5nm)/TaN(5nm) stack can withstand annealing up to 600°C for 30min and the Mo-Ta(5nm) alloy barrier can effectively prevent Cu diffusion after 500°C annealing.
The diffusion barrier properties of Co/TaN bilayer as Cu adhesion layer/diffusion barrier on the Si and low k (k = 2.5) substrates were investigated. The barrier was prepared by using ion-beam sputtering technique. The barrier property was investigated by sheet resistance, X-ray diffraction (XRD), and Auger electron spectroscopy (AES) and electrical measurements. No obvious Cu diffusion and agglomeration...
Conventional memories such as SRAM, DRAM, and FLASH have set a very high cost/performance standard. Yet, recent advances in new materials, device technologies and circuits have made many emerging memories attractive candidates for a new generation of memories. This paper gives an overview of our recent research work on phase change memory (PCM) and metal oxide resistive switching memory (RRAM).
Two types of ReRAM are investigated. The first is a CB-ReRAM (conducting bridge ReRAM) that uses metallic ions to form the bridge. This type of device is known to be unstable because the conducting bridge tends to self-destruct. By adding a buffer layer between the electrode and the electrolyte, the retention of the Cu-based CB-ReRAM is greatly improved while the superior electrical performance is...
In this paper, the static and dynamic switching characteristics of Ti/HfO2/TiN resistive random access memory (RRAM) have been examined. Based on the experimental results, several pertinent device characteristics can be developed, which include a tunneling barrier width model to explain the RRAM switching behaviors, and the ac transient switching characteristics for circuit model development. We also...
A novel resistive memory with the TiN/Ti/HfOx/TiN stack is proposed and fully integrated with 0.18 μm CMOS technology. The excellent memory performances such as low operation current (down to 25 μA), low operation voltage (<;1.5 V), high ON/OFF resistance ratio (above 100), and fast switching speed (10 ns) have been demonstrated for this ReRAM. Moreover, the device exhibits excellent scalability...
A method based on Frenkel-Poole emission is proposed to model the I-V data of the amorphous state (high resistance state) in mushroom-type phase-change memory (PCM) devices. We found the I-V characteristics in the high resistance state are dominated by (i) the size of the amorphous GST (aGST) volume and (ii) the trap density of the amorphized GST material. Neither (i) nor (ii) can't be resolved by...
In order to calculate the temperature of the phase change memory (PCM) cell, a thermal physical model of the PCM device having Ge2Sb2Te5 (GST) layer has been proposed and demonstrated. By calculating and comparing with the Joule heating of the PCM cell at different programming state between based on the voltage - current curves and based on the formula to calculate temperature, it is found that the...
Typical bipolar resistive switching behavior are observed in the In/poly-Fe2O3/Nb-SrTiO3 (Nb-STO) devices. Rectifying I-V characteristics along with switching ratio significantly related to the polarity of read voltage have been found. A negative read voltage remarkable enhances the switching ratio to 107 comparing with 102 for the positive polarity, which demonstrates an efficient way to improve...
1T1R-architecture devices were fabricated by integrating ZrO2 based crossbar structure ReRAM onto a foundry-built MOSFET platform. Multilevel operation was realized by using the current limit of a selected cell transistor in the set process. The current level was determined by the transistor's gate voltage, resulting in the control of electrical resistance of the filamentary conductive paths in the...
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