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In this paper, CMOS analog front-end circuits for silicon condenser microphones are newly proposed. The proposed analog front-end circuits are attractive due to that all the analog block circuits for silicon condenser microphones are robust and compact to be integrated. Based upon the device parameters of 0.35 mum 2P4M CMOS technology with 3 V power supply, all the functions and performance of the...
In order to correct non-linearities due to high power amplifiers (HPA) operating near saturation in telecommunication transceivers, a new adaptative predistortion system based on neural networks (NNs) was developed. For size, consumption and bandwidth purposes, the multi-layer perceptron (MLP) type NNs were implemented in a 0.6mum CMOS ASIC. The NNs parameters are updated with a computer as a function...
A Neural Network (NN), implemented in 0.35 mum CMOS technology, was integrated in order to increase the distance range of a phase-shift laser range-finder and to achieve surface discrimination. The overall sensor was validated for well defined experimental conditions. Then, a digital updating system was developed, so that the embedded sensor achieves its task autonomously onboard the application,...
This paper presents a receiver channel for a pulsed time-of-flight laser rangefinder with dual threshold leading edge timing discrimination. The timing error dependent on amplitude variations is corrected by measuring the slew rate of the arrival optical pulse. In this way the correction can be continued after the pulse is clipped so that the residual error can be minimized. The measured bandwidth,...
A high input impedance electronically tunable voltage-mode biquadratic filter with single input and three outputs using four simple CMOS operational transconductance amplifiers and two grounded capacitors is proposed. The proposed filter provides low-pass, band-pass and high-pass voltage responses at a high input impedance terminal, which enables easy cascadability of the voltage circuit. Also, the...
Modulo 2n + 1 multipliers are the primitive computational logic components widely used in residue arithmetic, digital signal processing and cryptography. In this work, a fast low-power hardware implementation of modulo 2n + 1 multiplier is proposed and validated. The proposed hardware architecture is based on the efficient compressors and modulo carry look-ahead adders as the basic building blocks...
In this paper, a 14-bit oversampled delta-sigma modulator for silicon condenser microphones is newly proposed. The proposed oversampled delta-sigma modulator is attractive due to that the requirements of silicon condenser microphones are successfully matched. Based upon the device parameters of 0.35 mum 2P4M CMOS technology with 3.0 V power supply, all the functions and performance of the proposed...
This paper proposes a novel approach to minimize leakage currents in CMOS circuits during the off-state (or standby mode, sleep mode) by applying the optimal reverse body bias to the substrate (body or bulk) to increase the threshold voltage of transistors. The optimal bias point is determined by comparing the sub-threshold current (ISUB) and band-to-band current (IBTBT) simultaneously. The proposed...
In this work, the design of a Time-to-Digital Converter (TDC) for measuring the time-of-flight (ToF) of a radio pulse is described. It consists on two blocks: a time-to-voltage transducer, whose scheme is that of a charge pump, designed using a 0.25 mum CMOS process, and an incremental first order sigma-delta (SigmaDelta) converter. The two blocks are connected together by means of a sample and hold...
A time-to-digital converter (TDC) based on a free running ring oscillator and timing signal interpolators has been fabricated in a 0.13 mum CMOS process for the receiver of a pulsed time-of-flight laser rangefinder (TOF). The time-to-digital conversion is based on counting the pulses of this eighth-stage, differential ring oscillator and additionally registering the state of its 16 phases at the arrival...
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