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An RF n-MOST model was developed based on PSP model, which is considered as one of standard surface potential based compact model for deep-submicron applications. The RF sub-circuit is presented after analyzing the structure and layout of a specific RF n-MOST, and the parasitic parameters extracted analytically. Validated in DC, AC small-signal, and large-signal analysis, it proves that an excellent...
In this paper, an analytical model is proposed to study the carrier recombination-generation (R-G) processes in silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFET's). The correlations of the carrier lifetimes and the external perturbation rates have been investigated to examine the applicability and accuracy of techniques for carrier lifetimes measurement in device...
Off-state leakage current in a 65 nm partially depleted (PD) floating-body (FB) SOI technology is modeled and analyzed with emphasis on its drain-voltage dependence. Modeling accuracy of the off-state leakage current is highly dependent on modeling of parasitic currents, although their direct contribution to the leakage may be negligible in lower-power/high-performance technologies. The underlying...
In this paper an interdigital n-type CoSi2-Si Schottky diode is fabricated in SMIC 0.13 ??m RF CMOS process. A p+ guardring around Schottky contacts is used to reduce the leakage current at reverse biases. A novel and accurate Schottky diode model has been developed based on the DC and RF measurement data. In this novel model the losses due to parasitic capacitance dielectric and metal plate are considered...
In this paper, an empirical truncated balanced realization (TBR) approach is introduced to reduce the model order of non-quasi-static (NQS) effects in MOSFETs. In the PSP model (an industrial standard in compact modeling of MOSFETs), a simple spline-collocation (SC) approach is most commonly used to compute NQS. The SC technique, however, suffers from relatively high computing effort. To the best...
A charge based compact model with self-heating effects has been developed for LDMOS transistors. Both the channel and drift regions in LDMOS are modeled without adding an internal drain node. An efficient scheme for including self-heating effects is implemented in the model, which requires no thermal network. A comparison with measured data from an LDMOS shows that the model has excellent accuracy...
A semi-empirical analytical model of the turn-on characteristics of poly-silicon thin-film transistor (TFT) with considering kink effect is presented based on the physical characteristics of poly-silicon thin film. With reference to the approach of modeling the kink effect in SOI devices and considering the grain boundaries in poly-silicon thin film, the dc characteristics of poly-silicon TFT are...
In this paper, a model of the effective mobility for the on-current of p-Si TFT is proposed, taking into account the gain size, the drain bias, the imperfection crystal scattering mechanism, and the surface-roughness scattering mechanism. It is found that at the linearity region, the effective mobility decreases with the drain bias increasing and increases with the grain size increasing. The simulation...
In this paper, electrostatic discharge (ESD) protection in advanced technologies is discussed. The dilemma of ESD protection in advanced technologies and whether we will maintain the need, and desire to provide ESD protection in the future will be reviewed. This issue will influence the direction of the field of ESD protection and the ESD Technology Roadmap. The paper will also focus on what will...
Electrostatic discharge (ESD) protection requirements for high voltage (HV) MOS technology are continuously evolving and increasingly stringent. To address the ever changing technology ESD constraints, a method for design, characterization, and integration of reliable mixed-signal HV MOS ESD solutions is introduced in this study. The dynamic response, design trade-offs and ESD verification in two...
Most integrated circuit ESD damages are caused by CDM stresses. This paper discusses CDM failure modes. The most common such failure is damage to the gate oxide in the MOS device. A new methodology that uses a gate oxide damage monitor and modified VFTLP testing is proposed for assessing CDM protection effectiveness and robustness in I/O circuits. A test structure for such an evaluation is also introduced.
A novel dual direction SCR (DDSCR) ESD protection device is implemented in HJTK 0.18-??m CMOS process without deep N-well or T-well masks. Both parallel and anti-parallel metal routing method of multi-fingered DDSCR is investigated in this paper. It shows that metal routing in layout design plays an important role in the performance of multi-fingered DDSCR due to its symmetrical TLP I-V plot characteristics.
This work is referring to the nMOSFET singer-finger, multi-finger structures under the Electro-Static Discharge (ESD) zapping, and to evaluate the current distribution situations. By using the TCAD and HSpice, because of the internal parasitic resistance differences in each one finger, which can cause non-uniform turned on. Meanwhile, with different interior parasitic capacitor on each nMOSFET type,...
A new electrostatic discharge (ESD) protection circuit based on a standard of 0.6 ??m CMOS p-well technology has been designed and fabricated according to the request of trigger voltage, chip area and static current to high-speed CMOS IC. The new protection circuit was verified by a multi-project wafer (MPW) fabrication and tested by the transmission line pulse (TLP) generator system. The results...
The utility of the Contact Block Reduction method (CBR) to find the retarded Green??s function for ballistic quantum devices with semi-empirical tight binding band (TB) models is discussed. This work shows that the original method needs several modifications to be used with TB models. In the common case where two contacts are used for transport in quantum wires, our approach computes the transmission...
Nanoelectronic devices can be, in one way, characterized by the large surface/volume ratio in addition to the central role of quantum effects. This paper describes a computationally efficient way of obtaining the band-structure of the intrinsic device including the interface with metal contacts using the extended Huckel theory (EHT). Carrier quantum transport is then computed by NEGF (non-equilibrium...
Solvers based on a spherical harmonics expansion (SHE) of the Boltzmann equation (BE) are a deterministic alternative to the stochastic Monte Carlo (MC) method. Their numerical properties are very similar to the classical approaches (drift-diffusion or hydrodynamic models), and the same numerical methods can be used (box integration, maximum entropy dissipation scheme (MEDS), Newton-Raphson method,...
Carbon nanotubes (CNTs) have been studied in recent years due to their exceptional electronic, opto-electronic, and mechanical properties. To explore the physics of carbon nanotube field-effect transistors (CNT-FETs) self-consistent quantum mechanical simulations have been performed. The performance of carbon nanotube-based transistors is analyzed numerically, employing the non-equilibrium Green??s...
In this paper, the opportunities offered by mono-atomic layers of graphene for the fabrication of high-performance nanoribbon FETs are examined. Starting from the description of some fundamental material properties, such as the single-particle Hamiltonian in graphene and its analogy with massless Dirac fermions in quantum electrodynamics, we proceed with the examination of the GNR band structure and,...
The harmonic distortion of experimental n-MOSFETs with different channel lengths has been studied from their measured transfer characteristics, using a recently proposed alternative mathematical procedure called ??full successive integrals method?? (FSIM). The FSIM allows accurate calculation of the Fourier coefficients (Hk) and hence traditional figures of merit such as THD, HDk, IP2 and IP3 can...
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