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A low power monolithic reconfigurable direct-conversion receiver RF front-end for 802.11a/b/g applications is presented. It consists of a reconfigurable LNA and a high linearity quadrature down-converter. The LNA could be switched between two operation bands by utilizing a fully-differential switchable inductor. With a positive feedback, the noise figure of the common gate LNA is lowered down. The...
A wide-band variable-gain LNA, RF VGA and a mixer implemented in 50 GHz 0.5 ??m SiGe BiCMOS technology for DVB-H tuner front-end is presented. The LNA uses the distribution structure with a fixed gain stage to get 20 dB variable gain and low noise. The LNA achieves 600 MHz bandwidth with less than 6 dB noise figure and +3-dBm of IIP3 at max gain. The RF VGA is carefully designed to get 30 dB variable...
A multi-standard transceiver requires a wide-band radio frequency front-end in order to process RF signals of any frequency included by all the standards concerned. A noise cancellation technology is utilized in the low noise amplifier (LNA) to cancel the noise introduced by the source resistance matching segment. An active balun is embedded in the input stage of the mixer, which connect the single-end...
This paper presents a robust RF front-end for 3.1-4.8-GHz direct-conversion Ultra-wideband (UWB) applications such as the MB-OFDM UWB. The circuits contain a gain controllable low-noise amplifier (LNA) with resistive feedback, a merged quadrature mixer with static current injection, and local oscillator (LO) buffers. Post-layout simulations show that the fully differential front-end achieves a maximum...
Most of papers have ignored the effect of gate-drain capacitance of transistor due to its complexity when they analyze a low noise amplifier circuit (LNA). However, as scaling down the CMOS technology, the ratio of gate-drain capacitance (Cgd) to gate-source capacitance (Cgs) increases. This phenomenon affects the input matching, power gain and noise figure of the LNA circuit. In this paper, we propose...
In this paper, a low-power ultra-wideband (UWB) low-noise amplifier (LNA) is proposed. We use shunt-feedback resistor structure for wideband input matching and series L-shunt C structure for gain flatness. Numerical simulation based on TSMC 0.18 μm 1 poly-6 metal process shows that the UWB LNA achieves 18 dB gain at 3-5 GHz band and 3 dB noise figure, operates from 1.8 V power supply, and dissipates...
In this paper, design approach of 2.4 GHz CMOS ultra low power Low Noise Amplifier (LNA) using 65 nm CMOS technology is presented. Conventional Inductively degenerated cascode topology where both MOS transistors are biased in sub-threshold region is used. There are many performance factors of LNAs such as signal power gain, noise factor, input referred 1-dB compression point (P-1dBin) and power consumption...
A UWB LNA (low noise amplifier) based on 0.35 ??m SiGe BiCMOS technology is presented in this paper. This LNA adopts a resistance feedback topology to optimize the gain and noise figure. The serial inductance at the base is used to matching input impedance and decreasing group delay variation. The simulation results indicate that the gain of LNA reaches 12.5 dB with the variation of 1.9 dB and the...
A wideband full integrated LNA without inductors is designed for low-voltage, low-power applications in 0.13 μm CMOS technology. Based on the common-gate-common-source (CG-CS) topology employing noise canceling, a negative feedback path is introduced between CS and CG paths for low-power operation. The proposed LNA exhibits 23 dB voltage gain, 1.9-2.4 dB noise figure from 500 MHz to 4 GHz while only...
A differential low noise amplifier applied in ASK receiver is designed and fabricated in UMC 0.18 ??m CMOS process. The amplifier employs a differential cascode structure with source degeneration stage for single input and differential output, and avoids using balun when connected to mixer. This low noise amplifier has a measured forward gain of 18.2 dB and a noise figure of only 1.65 dB, thus can...
This paper presents a highly linear wideband low-noise amplifier (LNA) adopting the current amplification and distortion cancellation, it exploits the noise cancellation for the low-noise, and employs a low second-order distortion PMOS/NMOS input pair and the current mirror amplifier in order to highly improve the linearity. The proposed CMOS LNA exhibits a power gain of 16.0 dB, an IIP3 of 9.5 dBm,...
A 1.2 V Frontend intended for use in a Bluetooth receiver has been implemented in a 0.13 um CMOS process. The Frontend comprises a LNA, I/Q mixer and a 1st order active LPF. The presented Frontend is highly integrated with only 7.2 mA current consumption with a 1.2 V supply. The Frontend achieves a voltage gain of 37 dB, 7.55 dB SSB noise figure, -18.4 dBm IIP3 and input return loss of 8 dB at 2.44...
This paper presents a technique using current-mode approach for a CMOS differential low noise amplifier design, simulated with a TSMC 0.18 ??m RF CMOS process, working at 1.2 V supply. A comparison with conventional voltage-mode LNA shows that this LNA has advantages of low voltage, low power consumption and simple structure. Simulation results demonstrate that at 2.4 GHz, the noise figure is only...
An experimental study on energy injection induced damage by a pulse-modulated carrier with 300 MHz radio frequency (RF) signal source to a GaAs bipolar low noise amplifier (LNA) with and without DC bias is presented in this paper based on the measurement of the noise figure and gain variation of GaAs LNA prior to and after the energy injection. Experimental results show that the noise figures of LNA...
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